rp2040: fix incorrect inline assembly
The register r0 was used unconditionally. This is a bug: the compiler doesn't know it is clobbered and might consider it alive across the inline assembly expression. The fix is simple. It could probably be optimized, but this should at least fix the bug.
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@ -149,16 +149,13 @@ func (clk *clock) configure(src, auxsrc, srcFreq, freq uint32) {
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// Note XOSC_COUNT is not helpful here because XOSC is not
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// Note XOSC_COUNT is not helpful here because XOSC is not
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// necessarily running, nor is timer... so, 3 cycles per loop:
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// necessarily running, nor is timer... so, 3 cycles per loop:
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delayCyc := configuredFreq[clkSys]/configuredFreq[clk.cix] + 1
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delayCyc := configuredFreq[clkSys]/configuredFreq[clk.cix] + 1
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arm.AsmFull(
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for delayCyc != 0 {
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`
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// This could be done more efficiently but TinyGo inline
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ldr r0, {cyc}
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// assembly is not yet capable enough to express that. In the
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1:
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// meantime, this forces at least 3 cycles per loop.
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subs r0, #1
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delayCyc--
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bne 1b
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arm.Asm("nop\nnop\nnop")
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`,
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}
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map[string]interface{}{
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"cyc": &delayCyc,
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})
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}
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}
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}
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}
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