tools/gen-device: complete refactor to new generator based on volatile package
Signed-off-by: Ron Evans <ron@hybridgroup.com>
Этот коммит содержится в:
Ron Evans
Ayke
родитель
9f8340a970
коммит
3a73e64557
3 изменённых файлов: 144 добавлений и 716 удалений
6
Makefile
6
Makefile
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@ -46,15 +46,15 @@ gen-device-avr:
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go fmt ./src/device/avr
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gen-device-nrf:
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./tools/gen-device-svd-vol.py lib/nrfx/mdk/ src/device/nrf/ --source=https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
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./tools/gen-device-svd.py lib/nrfx/mdk/ src/device/nrf/ --source=https://github.com/NordicSemiconductor/nrfx/tree/master/mdk
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go fmt ./src/device/nrf
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gen-device-sam:
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./tools/gen-device-svd-vol.py lib/cmsis-svd/data/Atmel/ src/device/sam/ --source=https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
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./tools/gen-device-svd.py lib/cmsis-svd/data/Atmel/ src/device/sam/ --source=https://github.com/posborne/cmsis-svd/tree/master/data/Atmel
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go fmt ./src/device/sam
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gen-device-stm32:
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./tools/gen-device-svd-vol.py lib/cmsis-svd/data/STMicro/ src/device/stm32/ --source=https://github.com/posborne/cmsis-svd/tree/master/data/STMicro
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./tools/gen-device-svd.py lib/cmsis-svd/data/STMicro/ src/device/stm32/ --source=https://github.com/posborne/cmsis-svd/tree/master/data/STMicro
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go fmt ./src/device/stm32
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@ -1,692 +0,0 @@
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#!/usr/bin/env python3
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import sys
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import os
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from xml.etree import ElementTree
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from glob import glob
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from collections import OrderedDict
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import re
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import argparse
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class Device:
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# dummy
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pass
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def getText(element):
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if element is None:
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return "None"
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return ''.join(element.itertext())
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def formatText(text):
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text = re.sub('[ \t\n]+', ' ', text) # Collapse whitespace (like in HTML)
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text = text.replace('\\n ', '\n')
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text = text.strip()
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return text
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def readSVD(path, sourceURL):
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# Read ARM SVD files.
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device = Device()
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xml = ElementTree.parse(path)
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root = xml.getroot()
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deviceName = getText(root.find('name'))
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deviceDescription = getText(root.find('description')).strip()
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licenseTexts = root.findall('licenseText')
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if len(licenseTexts) == 0:
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licenseText = None
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elif len(licenseTexts) == 1:
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licenseText = formatText(getText(licenseTexts[0]))
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else:
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raise ValueError('multiple <licenseText> elements')
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device.peripherals = []
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peripheralDict = {}
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groups = {}
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interrupts = OrderedDict()
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for periphEl in root.findall('./peripherals/peripheral'):
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name = getText(periphEl.find('name'))
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descriptionTags = periphEl.findall('description')
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description = ''
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if descriptionTags:
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description = formatText(getText(descriptionTags[0]))
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baseAddress = int(getText(periphEl.find('baseAddress')), 0)
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groupNameTags = periphEl.findall('groupName')
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groupName = None
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if groupNameTags:
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groupName = getText(groupNameTags[0])
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interruptEls = periphEl.findall('interrupt')
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for interrupt in interruptEls:
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intrName = getText(interrupt.find('name'))
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intrIndex = int(getText(interrupt.find('value')))
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addInterrupt(interrupts, intrName, intrIndex, description)
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# As a convenience, also use the peripheral name as the interrupt
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# name. Only do that for the nrf for now, as the stm32 .svd files
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# don't always put interrupts in the correct peripheral...
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if len(interruptEls) == 1 and deviceName.startswith('nrf'):
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addInterrupt(interrupts, name, intrIndex, description)
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if periphEl.get('derivedFrom') or groupName in groups:
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if periphEl.get('derivedFrom'):
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derivedFromName = periphEl.get('derivedFrom')
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derivedFrom = peripheralDict[derivedFromName]
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else:
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derivedFrom = groups[groupName]
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peripheral = {
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'name': name,
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'groupName': derivedFrom['groupName'],
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'description': description or derivedFrom['description'],
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'baseAddress': baseAddress,
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}
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device.peripherals.append(peripheral)
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peripheralDict[name] = peripheral
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if 'subtypes' in derivedFrom:
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for subtype in derivedFrom['subtypes']:
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subp = {
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'name': name + "_"+subtype['clusterName'],
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'groupName': subtype['groupName'],
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'description': subtype['description'],
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'baseAddress': baseAddress,
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}
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device.peripherals.append(subp)
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continue
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peripheral = {
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'name': name,
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'groupName': groupName or name,
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'description': description,
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'baseAddress': baseAddress,
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'registers': [],
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'subtypes': [],
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}
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device.peripherals.append(peripheral)
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peripheralDict[name] = peripheral
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if groupName and groupName not in groups:
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groups[groupName] = peripheral
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regsEls = periphEl.findall('registers')
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if regsEls:
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if len(regsEls) != 1:
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raise ValueError('expected just one <registers> in a <peripheral>')
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for register in regsEls[0].findall('register'):
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peripheral['registers'].extend(parseRegister(groupName or name, register, baseAddress))
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for cluster in regsEls[0].findall('cluster'):
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clusterName = getText(cluster.find('name')).replace('[%s]', '')
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clusterDescription = getText(cluster.find('description'))
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clusterPrefix = clusterName + '_'
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clusterOffset = int(getText(cluster.find('addressOffset')), 0)
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if cluster.find('dim') is None:
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if clusterOffset is 0:
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# make this a separate peripheral
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cpRegisters = []
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for regEl in cluster.findall('register'):
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cpRegisters.extend(parseRegister(groupName, regEl, baseAddress, clusterName+"_"))
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cpRegisters.sort(key=lambda r: r['address'])
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clusterPeripheral = {
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'name': name+ "_" +clusterName,
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'groupName': groupName+ "_" +clusterName,
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'description': description+ " - " +clusterName,
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'clusterName': clusterName,
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'baseAddress': baseAddress,
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'registers': cpRegisters,
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}
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device.peripherals.append(clusterPeripheral)
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peripheral['subtypes'].append(clusterPeripheral)
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continue
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dim = None
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dimIncrement = None
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else:
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dim = int(getText(cluster.find('dim')))
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dimIncrement = int(getText(cluster.find('dimIncrement')), 0)
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clusterRegisters = []
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for regEl in cluster.findall('register'):
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clusterRegisters.extend(parseRegister(groupName or name, regEl, baseAddress + clusterOffset, clusterPrefix))
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clusterRegisters.sort(key=lambda r: r['address'])
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if dimIncrement is None:
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lastReg = clusterRegisters[-1]
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lastAddress = lastReg['address']
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if lastReg['array'] is not None:
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lastAddress = lastReg['address'] + lastReg['array'] * lastReg['elementsize']
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firstAddress = clusterRegisters[0]['address']
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dimIncrement = lastAddress - firstAddress
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peripheral['registers'].append({
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'name': clusterName,
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'address': baseAddress + clusterOffset,
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'description': clusterDescription,
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'registers': clusterRegisters,
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'array': dim,
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'elementsize': dimIncrement,
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})
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peripheral['registers'].sort(key=lambda r: r['address'])
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device.interrupts = sorted(interrupts.values(), key=lambda v: v['index'])
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licenseBlock = ''
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if licenseText is not None:
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licenseBlock = '// ' + licenseText.replace('\n', '\n// ')
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licenseBlock = '\n'.join(map(str.rstrip, licenseBlock.split('\n'))) # strip trailing whitespace
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device.metadata = {
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'file': os.path.basename(path),
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'descriptorSource': sourceURL,
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'name': deviceName,
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'nameLower': deviceName.lower(),
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'description': deviceDescription,
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'licenseBlock': licenseBlock,
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}
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return device
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def addInterrupt(interrupts, intrName, intrIndex, description):
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if intrName in interrupts:
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if interrupts[intrName]['index'] != intrIndex:
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raise ValueError('interrupt with the same name has different indexes: %s (%d vs %d)'
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% (intrName, interrupts[intrName]['index'], intrIndex))
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if description not in interrupts[intrName]['description'].split(' // '):
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interrupts[intrName]['description'] += ' // ' + description
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else:
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interrupts[intrName] = {
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'name': intrName,
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'index': intrIndex,
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'description': description,
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}
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def parseBitfields(groupName, regName, fieldsEls, bitfieldPrefix=''):
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fields = []
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if fieldsEls:
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for fieldEl in fieldsEls[0].findall('field'):
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fieldName = getText(fieldEl.find('name'))
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descrEls = fieldEl.findall('description')
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lsbTags = fieldEl.findall('lsb')
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if len(lsbTags) == 1:
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lsb = int(getText(lsbTags[0]))
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else:
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lsb = int(getText(fieldEl.find('bitOffset')))
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msbTags = fieldEl.findall('msb')
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if len(msbTags) == 1:
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msb = int(getText(msbTags[0]))
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else:
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msb = int(getText(fieldEl.find('bitWidth'))) + lsb - 1
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fields.append({
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'name': '{}_{}{}_{}_Pos'.format(groupName, bitfieldPrefix, regName, fieldName),
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'description': 'Position of %s field.' % fieldName,
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'value': lsb,
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})
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fields.append({
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'name': '{}_{}{}_{}_Msk'.format(groupName, bitfieldPrefix, regName, fieldName),
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'description': 'Bit mask of %s field.' % fieldName,
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'value': (0xffffffff >> (31 - (msb - lsb))) << lsb,
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})
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if lsb == msb: # single bit
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fields.append({
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'name': '{}_{}{}_{}'.format(groupName, bitfieldPrefix, regName, fieldName),
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'description': 'Bit %s.' % fieldName,
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'value': 1 << lsb,
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})
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for enumEl in fieldEl.findall('enumeratedValues/enumeratedValue'):
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enumName = getText(enumEl.find('name'))
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enumDescription = getText(enumEl.find('description'))
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enumValue = int(getText(enumEl.find('value')), 0)
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fields.append({
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'name': '{}_{}{}_{}_{}'.format(groupName, bitfieldPrefix, regName, fieldName, enumName),
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'description': enumDescription,
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'value': enumValue,
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})
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return fields
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def parseRegister(groupName, regEl, baseAddress, bitfieldPrefix=''):
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regName = getText(regEl.find('name'))
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regDescription = getText(regEl.find('description'))
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offsetEls = regEl.findall('offset')
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if not offsetEls:
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offsetEls = regEl.findall('addressOffset')
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address = baseAddress + int(getText(offsetEls[0]), 0)
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size = 4
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elSizes = regEl.findall('size')
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if elSizes:
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size = int(getText(elSizes[0]), 0) // 8
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dimEls = regEl.findall('dim')
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fieldsEls = regEl.findall('fields')
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array = None
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if dimEls:
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array = int(getText(dimEls[0]), 0)
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dimIncrement = int(getText(regEl.find('dimIncrement')), 0)
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if "[%s]" in regName:
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# just a normal array of registers
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regName = regName.replace('[%s]', '')
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elif "%s" in regName:
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# a "spaced array" of registers, special processing required
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# we need to generate a separate register for each "element"
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results = []
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for i in range(array):
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regAddress = address + (i * dimIncrement)
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results.append({
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'name': regName.replace('%s', str(i)),
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'address': regAddress,
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'description': regDescription.replace('\n', ' '),
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'bitfields': [],
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'array': None,
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'elementsize': size,
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})
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# set first result bitfield
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shortName = regName.replace('_%s', '').replace('%s', '')
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results[0]['bitfields'] = parseBitfields(groupName, shortName, fieldsEls, bitfieldPrefix)
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return results
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return [{
|
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'name': regName,
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'address': address,
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'description': regDescription.replace('\n', ' '),
|
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'bitfields': parseBitfields(groupName, regName, fieldsEls, bitfieldPrefix),
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'array': array,
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'elementsize': size,
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}]
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|
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def writeGo(outdir, device):
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# The Go module for this device.
|
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out = open(outdir + '/' + device.metadata['nameLower'] + '.go', 'w')
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pkgName = os.path.basename(outdir.rstrip('/'))
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out.write('''\
|
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// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.py from {file}, see {descriptorSource}
|
||||
|
||||
// +build {pkgName},{nameLower}
|
||||
|
||||
// {description}
|
||||
//
|
||||
{licenseBlock}
|
||||
package {pkgName}
|
||||
|
||||
import (
|
||||
"runtime/volatile"
|
||||
"unsafe"
|
||||
)
|
||||
|
||||
// Special types that causes loads/stores to be volatile (necessary for
|
||||
// memory-mapped registers).
|
||||
type Register8 struct {{
|
||||
Reg uint8
|
||||
}}
|
||||
|
||||
// Get returns the value in the register. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) Get() uint8 {{
|
||||
return volatile.LoadUint8(&r.Reg)
|
||||
}}
|
||||
|
||||
// Set updates the register value. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg = value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) Set(value uint8) {{
|
||||
volatile.StoreUint8(&r.Reg, value)
|
||||
}}
|
||||
|
||||
// SetBits reads the register, sets the given bits, and writes it back. It is
|
||||
// the volatile equivalent of:
|
||||
//
|
||||
// r.Reg |= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) SetBits(value uint8) {{
|
||||
volatile.StoreUint8(&r.Reg, volatile.LoadUint8(&r.Reg) | value)
|
||||
}}
|
||||
|
||||
// ClearBits reads the register, clears the given bits, and writes it back. It
|
||||
// is the volatile equivalent of:
|
||||
//
|
||||
// r.Reg &^= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) ClearBits(value uint8) {{
|
||||
volatile.StoreUint8(&r.Reg, volatile.LoadUint8(&r.Reg) &^ value)
|
||||
}}
|
||||
|
||||
type Register16 struct {{
|
||||
Reg uint16
|
||||
}}
|
||||
|
||||
// Get returns the value in the register. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) Get() uint16 {{
|
||||
return volatile.LoadUint16(&r.Reg)
|
||||
}}
|
||||
|
||||
// Set updates the register value. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg = value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) Set(value uint16) {{
|
||||
volatile.StoreUint16(&r.Reg, value)
|
||||
}}
|
||||
|
||||
// SetBits reads the register, sets the given bits, and writes it back. It is
|
||||
// the volatile equivalent of:
|
||||
//
|
||||
// r.Reg |= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) SetBits(value uint16) {{
|
||||
volatile.StoreUint16(&r.Reg, volatile.LoadUint16(&r.Reg) | value)
|
||||
}}
|
||||
|
||||
// ClearBits reads the register, clears the given bits, and writes it back. It
|
||||
// is the volatile equivalent of:
|
||||
//
|
||||
// r.Reg &^= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) ClearBits(value uint16) {{
|
||||
volatile.StoreUint16(&r.Reg, volatile.LoadUint16(&r.Reg) &^ value)
|
||||
}}
|
||||
|
||||
type Register32 struct {{
|
||||
Reg uint32
|
||||
}}
|
||||
|
||||
// Get returns the value in the register. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) Get() uint32 {{
|
||||
return volatile.LoadUint32(&r.Reg)
|
||||
}}
|
||||
|
||||
// Set updates the register value. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg = value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) Set(value uint32) {{
|
||||
volatile.StoreUint32(&r.Reg, value)
|
||||
}}
|
||||
|
||||
// SetBits reads the register, sets the given bits, and writes it back. It is
|
||||
// the volatile equivalent of:
|
||||
//
|
||||
// r.Reg |= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) SetBits(value uint32) {{
|
||||
volatile.StoreUint32(&r.Reg, volatile.LoadUint32(&r.Reg) | value)
|
||||
}}
|
||||
|
||||
// ClearBits reads the register, clears the given bits, and writes it back. It
|
||||
// is the volatile equivalent of:
|
||||
//
|
||||
// r.Reg &^= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) ClearBits(value uint32) {{
|
||||
volatile.StoreUint32(&r.Reg, volatile.LoadUint32(&r.Reg) &^ value)
|
||||
}}
|
||||
|
||||
// Some information about this device.
|
||||
const (
|
||||
DEVICE = "{name}"
|
||||
)
|
||||
'''.format(pkgName=pkgName, **device.metadata))
|
||||
|
||||
out.write('\n// Interrupt numbers\nconst (\n')
|
||||
for intr in device.interrupts:
|
||||
out.write('\tIRQ_{name} = {index} // {description}\n'.format(**intr))
|
||||
intrMax = max(map(lambda intr: intr['index'], device.interrupts))
|
||||
out.write('\tIRQ_max = {} // Highest interrupt number on this device.\n'.format(intrMax))
|
||||
out.write(')\n')
|
||||
|
||||
# Define actual peripheral pointers.
|
||||
out.write('\n// Peripherals.\nvar (\n')
|
||||
for peripheral in device.peripherals:
|
||||
out.write('\t{name} = (*{groupName}_Type)(unsafe.Pointer(uintptr(0x{baseAddress:x}))) // {description}\n'.format(**peripheral))
|
||||
out.write(')\n')
|
||||
|
||||
# Define peripheral struct types.
|
||||
for peripheral in device.peripherals:
|
||||
if 'registers' not in peripheral:
|
||||
# This peripheral was derived from another peripheral. No new type
|
||||
# needs to be defined for it.
|
||||
continue
|
||||
out.write('\n// {description}\ntype {groupName}_Type struct {{\n'.format(**peripheral))
|
||||
address = peripheral['baseAddress']
|
||||
padNumber = 0
|
||||
for register in peripheral['registers']:
|
||||
if address > register['address'] and 'registers' not in register :
|
||||
# In Nordic SVD files, these registers are deprecated or
|
||||
# duplicates, so can be ignored.
|
||||
#print('skip: %s.%s %s - %s %s' % (peripheral['name'], register['name'], address, register['address'], register['elementsize']))
|
||||
continue
|
||||
eSize = register['elementsize']
|
||||
if eSize == 4:
|
||||
regType = 'Register32'
|
||||
elif eSize == 2:
|
||||
regType = 'Register16'
|
||||
elif eSize == 1:
|
||||
regType = 'Register8'
|
||||
else:
|
||||
eSize = 4
|
||||
regType = 'Register32'
|
||||
|
||||
# insert padding, if needed
|
||||
if address < register['address']:
|
||||
bytesNeeded = register['address'] - address
|
||||
if bytesNeeded == 1:
|
||||
out.write('\t_padding{padNumber} {regType}\n'.format(padNumber=padNumber, regType='Register8'))
|
||||
elif bytesNeeded == 2:
|
||||
out.write('\t_padding{padNumber} {regType}\n'.format(padNumber=padNumber, regType='Register16'))
|
||||
else:
|
||||
numSkip = (register['address'] - address) // eSize
|
||||
if numSkip == 1:
|
||||
out.write('\t_padding{padNumber} {regType}\n'.format(padNumber=padNumber, regType=regType))
|
||||
else:
|
||||
out.write('\t_padding{padNumber} [{num}]{regType}\n'.format(padNumber=padNumber, num=numSkip, regType=regType))
|
||||
padNumber += 1
|
||||
address = register['address']
|
||||
|
||||
lastCluster = False
|
||||
if 'registers' in register:
|
||||
# This is a cluster, not a register. Create the cluster type.
|
||||
regType = 'struct {\n'
|
||||
subaddress = register['address']
|
||||
for subregister in register['registers']:
|
||||
if subregister['elementsize'] == 4:
|
||||
subregType = 'Register32'
|
||||
elif subregister['elementsize'] == 2:
|
||||
subregType = 'Register16'
|
||||
else:
|
||||
subregType = 'Register8'
|
||||
|
||||
if subregister['array']:
|
||||
subregType = '[{}]{}'.format(subregister['array'], subregType)
|
||||
if subaddress != subregister['address']:
|
||||
bytesNeeded = subregister['address'] - subaddress
|
||||
if bytesNeeded == 1:
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='Register8')
|
||||
elif bytesNeeded == 2:
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='Register16')
|
||||
else:
|
||||
numSkip = (subregister['address'] - subaddress)
|
||||
if numSkip < 1:
|
||||
continue
|
||||
elif numSkip == 1:
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='Register8')
|
||||
else:
|
||||
regType += '\t\t_padding{padNumber} [{num}]{subregType}\n'.format(padNumber=padNumber, num=numSkip, subregType='Register8')
|
||||
padNumber += 1
|
||||
subaddress += bytesNeeded
|
||||
if subregister['array'] is not None:
|
||||
subaddress += subregister['elementsize'] * subregister['array']
|
||||
else:
|
||||
subaddress += subregister['elementsize']
|
||||
regType += '\t\t{name} {subregType}\n'.format(name=subregister['name'], subregType=subregType)
|
||||
if register['array'] is not None:
|
||||
if subaddress != register['address'] + register['elementsize']:
|
||||
numSkip = ((register['address'] + register['elementsize']) - subaddress) // 4
|
||||
if numSkip <= 1:
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType=subregType)
|
||||
else:
|
||||
regType += '\t\t_padding{padNumber} [{num}]{subregType}\n'.format(padNumber=padNumber, num=numSkip, subregType=subregType)
|
||||
else:
|
||||
lastCluster = True
|
||||
regType += '\t}'
|
||||
address = subaddress
|
||||
if register['array'] is not None:
|
||||
regType = '[{}]{}'.format(register['array'], regType)
|
||||
out.write('\t{name} {regType}\n'.format(name=register['name'], regType=regType))
|
||||
|
||||
# next address
|
||||
if lastCluster is True:
|
||||
lastCluster = False
|
||||
elif register['array'] is not None:
|
||||
address = register['address'] + register['elementsize'] * register['array']
|
||||
else:
|
||||
address = register['address'] + register['elementsize']
|
||||
out.write('}\n')
|
||||
|
||||
# Define bitfields.
|
||||
for peripheral in device.peripherals:
|
||||
if 'registers' not in peripheral:
|
||||
# This peripheral was derived from another peripheral. Bitfields are
|
||||
# already defined.
|
||||
continue
|
||||
out.write('\n// Bitfields for {name}: {description}\nconst('.format(**peripheral))
|
||||
for register in peripheral['registers']:
|
||||
if register.get('bitfields'):
|
||||
writeGoRegisterBitfields(out, register, register['name'])
|
||||
for subregister in register.get('registers', []):
|
||||
writeGoRegisterBitfields(out, subregister, register['name'] + '.' + subregister['name'])
|
||||
out.write(')\n')
|
||||
|
||||
def writeGoRegisterBitfields(out, register, name):
|
||||
out.write('\n\t// {}'.format(name))
|
||||
if register['description']:
|
||||
out.write(': {description}'.format(**register))
|
||||
out.write('\n')
|
||||
for bitfield in register['bitfields']:
|
||||
out.write('\t{name} = 0x{value:x}'.format(**bitfield))
|
||||
if bitfield['description']:
|
||||
out.write(' // {description}'.format(**bitfield))
|
||||
out.write('\n')
|
||||
|
||||
|
||||
def writeAsm(outdir, device):
|
||||
# The interrupt vector, which is hard to write directly in Go.
|
||||
out = open(outdir + '/' + device.metadata['nameLower'] + '.s', 'w')
|
||||
out.write('''\
|
||||
// Automatically generated file. DO NOT EDIT.
|
||||
// Generated by gen-device-svd.py from {file}, see {descriptorSource}
|
||||
|
||||
// {description}
|
||||
//
|
||||
{licenseBlock}
|
||||
|
||||
.syntax unified
|
||||
|
||||
// This is the default handler for interrupts, if triggered but not defined.
|
||||
.section .text.Default_Handler
|
||||
.global Default_Handler
|
||||
.type Default_Handler, %function
|
||||
Default_Handler:
|
||||
wfe
|
||||
b Default_Handler
|
||||
|
||||
// Avoid the need for repeated .weak and .set instructions.
|
||||
.macro IRQ handler
|
||||
.weak \\handler
|
||||
.set \\handler, Default_Handler
|
||||
.endm
|
||||
|
||||
// Must set the "a" flag on the section:
|
||||
// https://svnweb.freebsd.org/base/stable/11/sys/arm/arm/locore-v4.S?r1=321049&r2=321048&pathrev=321049
|
||||
// https://sourceware.org/binutils/docs/as/Section.html#ELF-Version
|
||||
.section .isr_vector, "a", %progbits
|
||||
.global __isr_vector
|
||||
// Interrupt vector as defined by Cortex-M, starting with the stack top.
|
||||
// On reset, SP is initialized with *0x0 and PC is loaded with *0x4, loading
|
||||
// _stack_top and Reset_Handler.
|
||||
.long _stack_top
|
||||
.long Reset_Handler
|
||||
.long NMI_Handler
|
||||
.long HardFault_Handler
|
||||
.long MemoryManagement_Handler
|
||||
.long BusFault_Handler
|
||||
.long UsageFault_Handler
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long 0
|
||||
.long SVC_Handler
|
||||
.long DebugMon_Handler
|
||||
.long 0
|
||||
.long PendSV_Handler
|
||||
.long SysTick_Handler
|
||||
|
||||
// Extra interrupts for peripherals defined by the hardware vendor.
|
||||
'''.format(**device.metadata))
|
||||
num = 0
|
||||
for intr in device.interrupts:
|
||||
if intr['index'] == num - 1:
|
||||
continue
|
||||
if intr['index'] < num:
|
||||
raise ValueError('interrupt numbers are not sorted')
|
||||
while intr['index'] > num:
|
||||
out.write(' .long 0\n')
|
||||
num += 1
|
||||
num += 1
|
||||
out.write(' .long {name}_IRQHandler\n'.format(**intr))
|
||||
|
||||
out.write('''
|
||||
// Define default implementations for interrupts, redirecting to
|
||||
// Default_Handler when not implemented.
|
||||
IRQ NMI_Handler
|
||||
IRQ HardFault_Handler
|
||||
IRQ MemoryManagement_Handler
|
||||
IRQ BusFault_Handler
|
||||
IRQ UsageFault_Handler
|
||||
IRQ SVC_Handler
|
||||
IRQ DebugMon_Handler
|
||||
IRQ PendSV_Handler
|
||||
IRQ SysTick_Handler
|
||||
''')
|
||||
for intr in device.interrupts:
|
||||
out.write(' IRQ {name}_IRQHandler\n'.format(**intr))
|
||||
|
||||
def generate(indir, outdir, sourceURL):
|
||||
if not os.path.isdir(indir):
|
||||
print('cannot find input directory:', indir, file=sys.stderr)
|
||||
sys.exit(1)
|
||||
if not os.path.isdir(outdir):
|
||||
os.mkdir(outdir)
|
||||
infiles = glob(indir + '/*.svd')
|
||||
if not infiles:
|
||||
print('no .svd files found:', indir, file=sys.stderr)
|
||||
sys.exit(1)
|
||||
for filepath in sorted(infiles):
|
||||
print(filepath)
|
||||
device = readSVD(filepath, sourceURL)
|
||||
writeGo(outdir, device)
|
||||
writeAsm(outdir, device)
|
||||
|
||||
|
||||
if __name__ == '__main__':
|
||||
parser = argparse.ArgumentParser(description='Generate Go register descriptors and interrupt vectors from .svd files')
|
||||
parser.add_argument('indir', metavar='indir', type=str,
|
||||
help='input directory containing .svd files')
|
||||
parser.add_argument('outdir', metavar='outdir', type=str,
|
||||
help='output directory')
|
||||
parser.add_argument('--source', metavar='source', type=str,
|
||||
help='output directory',
|
||||
default='<unknown>')
|
||||
args = parser.parse_args()
|
||||
generate(args.indir, args.outdir, args.source)
|
||||
|
|
@ -300,18 +300,138 @@ def writeGo(outdir, device):
|
|||
{licenseBlock}
|
||||
package {pkgName}
|
||||
|
||||
import "unsafe"
|
||||
import (
|
||||
"runtime/volatile"
|
||||
"unsafe"
|
||||
)
|
||||
|
||||
// Special types that cause loads/stores to be volatile (necessary for
|
||||
// Special types that causes loads/stores to be volatile (necessary for
|
||||
// memory-mapped registers).
|
||||
//go:volatile
|
||||
type RegValue uint32
|
||||
type Register8 struct {{
|
||||
Reg uint8
|
||||
}}
|
||||
|
||||
//go:volatile
|
||||
type RegValue16 uint16
|
||||
// Get returns the value in the register. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) Get() uint8 {{
|
||||
return volatile.LoadUint8(&r.Reg)
|
||||
}}
|
||||
|
||||
//go:volatile
|
||||
type RegValue8 uint8
|
||||
// Set updates the register value. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg = value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) Set(value uint8) {{
|
||||
volatile.StoreUint8(&r.Reg, value)
|
||||
}}
|
||||
|
||||
// SetBits reads the register, sets the given bits, and writes it back. It is
|
||||
// the volatile equivalent of:
|
||||
//
|
||||
// r.Reg |= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) SetBits(value uint8) {{
|
||||
volatile.StoreUint8(&r.Reg, volatile.LoadUint8(&r.Reg) | value)
|
||||
}}
|
||||
|
||||
// ClearBits reads the register, clears the given bits, and writes it back. It
|
||||
// is the volatile equivalent of:
|
||||
//
|
||||
// r.Reg &^= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register8) ClearBits(value uint8) {{
|
||||
volatile.StoreUint8(&r.Reg, volatile.LoadUint8(&r.Reg) &^ value)
|
||||
}}
|
||||
|
||||
type Register16 struct {{
|
||||
Reg uint16
|
||||
}}
|
||||
|
||||
// Get returns the value in the register. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) Get() uint16 {{
|
||||
return volatile.LoadUint16(&r.Reg)
|
||||
}}
|
||||
|
||||
// Set updates the register value. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg = value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) Set(value uint16) {{
|
||||
volatile.StoreUint16(&r.Reg, value)
|
||||
}}
|
||||
|
||||
// SetBits reads the register, sets the given bits, and writes it back. It is
|
||||
// the volatile equivalent of:
|
||||
//
|
||||
// r.Reg |= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) SetBits(value uint16) {{
|
||||
volatile.StoreUint16(&r.Reg, volatile.LoadUint16(&r.Reg) | value)
|
||||
}}
|
||||
|
||||
// ClearBits reads the register, clears the given bits, and writes it back. It
|
||||
// is the volatile equivalent of:
|
||||
//
|
||||
// r.Reg &^= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register16) ClearBits(value uint16) {{
|
||||
volatile.StoreUint16(&r.Reg, volatile.LoadUint16(&r.Reg) &^ value)
|
||||
}}
|
||||
|
||||
type Register32 struct {{
|
||||
Reg uint32
|
||||
}}
|
||||
|
||||
// Get returns the value in the register. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) Get() uint32 {{
|
||||
return volatile.LoadUint32(&r.Reg)
|
||||
}}
|
||||
|
||||
// Set updates the register value. It is the volatile equivalent of:
|
||||
//
|
||||
// *r.Reg = value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) Set(value uint32) {{
|
||||
volatile.StoreUint32(&r.Reg, value)
|
||||
}}
|
||||
|
||||
// SetBits reads the register, sets the given bits, and writes it back. It is
|
||||
// the volatile equivalent of:
|
||||
//
|
||||
// r.Reg |= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) SetBits(value uint32) {{
|
||||
volatile.StoreUint32(&r.Reg, volatile.LoadUint32(&r.Reg) | value)
|
||||
}}
|
||||
|
||||
// ClearBits reads the register, clears the given bits, and writes it back. It
|
||||
// is the volatile equivalent of:
|
||||
//
|
||||
// r.Reg &^= value
|
||||
//
|
||||
//go:inline
|
||||
func (r *Register32) ClearBits(value uint32) {{
|
||||
volatile.StoreUint32(&r.Reg, volatile.LoadUint32(&r.Reg) &^ value)
|
||||
}}
|
||||
|
||||
// Some information about this device.
|
||||
const (
|
||||
|
|
@ -349,22 +469,22 @@ const (
|
|||
continue
|
||||
eSize = register['elementsize']
|
||||
if eSize == 4:
|
||||
regType = 'RegValue'
|
||||
regType = 'Register32'
|
||||
elif eSize == 2:
|
||||
regType = 'RegValue16'
|
||||
regType = 'Register16'
|
||||
elif eSize == 1:
|
||||
regType = 'RegValue8'
|
||||
regType = 'Register8'
|
||||
else:
|
||||
eSize = 4
|
||||
regType = 'RegValue'
|
||||
regType = 'Register32'
|
||||
|
||||
# insert padding, if needed
|
||||
if address < register['address']:
|
||||
bytesNeeded = register['address'] - address
|
||||
if bytesNeeded == 1:
|
||||
out.write('\t_padding{padNumber} {regType}\n'.format(padNumber=padNumber, regType='RegValue8'))
|
||||
out.write('\t_padding{padNumber} {regType}\n'.format(padNumber=padNumber, regType='Register8'))
|
||||
elif bytesNeeded == 2:
|
||||
out.write('\t_padding{padNumber} {regType}\n'.format(padNumber=padNumber, regType='RegValue16'))
|
||||
out.write('\t_padding{padNumber} {regType}\n'.format(padNumber=padNumber, regType='Register16'))
|
||||
else:
|
||||
numSkip = (register['address'] - address) // eSize
|
||||
if numSkip == 1:
|
||||
|
|
@ -381,28 +501,28 @@ const (
|
|||
subaddress = register['address']
|
||||
for subregister in register['registers']:
|
||||
if subregister['elementsize'] == 4:
|
||||
subregType = 'RegValue'
|
||||
subregType = 'Register32'
|
||||
elif subregister['elementsize'] == 2:
|
||||
subregType = 'RegValue16'
|
||||
subregType = 'Register16'
|
||||
else:
|
||||
subregType = 'RegValue8'
|
||||
subregType = 'Register8'
|
||||
|
||||
if subregister['array']:
|
||||
subregType = '[{}]{}'.format(subregister['array'], subregType)
|
||||
if subaddress != subregister['address']:
|
||||
bytesNeeded = subregister['address'] - subaddress
|
||||
if bytesNeeded == 1:
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='RegValue8')
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='Register8')
|
||||
elif bytesNeeded == 2:
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='RegValue16')
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='Register16')
|
||||
else:
|
||||
numSkip = (subregister['address'] - subaddress)
|
||||
if numSkip < 1:
|
||||
continue
|
||||
elif numSkip == 1:
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='RegValue8')
|
||||
regType += '\t\t_padding{padNumber} {subregType}\n'.format(padNumber=padNumber, subregType='Register8')
|
||||
else:
|
||||
regType += '\t\t_padding{padNumber} [{num}]{subregType}\n'.format(padNumber=padNumber, num=numSkip, subregType='RegValue8')
|
||||
regType += '\t\t_padding{padNumber} [{num}]{subregType}\n'.format(padNumber=padNumber, num=numSkip, subregType='Register8')
|
||||
padNumber += 1
|
||||
subaddress += bytesNeeded
|
||||
if subregister['array'] is not None:
|
||||
|
|
|
|||
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Создание таблицы
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