machine/samd21: add hardware flow control for UART
Signed-off-by: deadprogram <ron@hybridgroup.com>
Этот коммит содержится в:
родитель
c2083014b3
коммит
3d9a1ca22a
1 изменённых файлов: 30 добавлений и 7 удалений
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@ -534,16 +534,16 @@ func (uart *UART) Configure(config UARTConfig) error {
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if !ok {
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return ErrInvalidOutputPin
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}
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var txPinOut uint32
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var txPadOut uint32
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// See table 25-9 of the datasheet (page 459) for how pads are mapped to
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// pinout values.
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switch txPad {
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case 0:
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txPinOut = 0
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txPadOut = 0
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case 2:
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txPinOut = 1
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txPadOut = 1
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default:
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// TODO: flow control (RTS/CTS)
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// this should be a flow control (RTS/CTS) pin
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return ErrInvalidOutputPin
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}
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@ -554,12 +554,35 @@ func (uart *UART) Configure(config UARTConfig) error {
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}
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// As you can see in table 25-8 on page 459 of the datasheet, input pins
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// are mapped directly.
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rxPinOut := rxPad
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rxPadOut := rxPad
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// configure pins
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config.TX.Configure(PinConfig{Mode: txPinMode})
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config.RX.Configure(PinConfig{Mode: rxPinMode})
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// configure RTS/CTS pins if provided
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if config.RTS != 0 && config.CTS != 0 {
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rtsPinMode, _, ok := findPinPadMapping(uart.SERCOM, config.RTS)
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if !ok {
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return ErrInvalidOutputPin
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}
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ctsPinMode, _, ok := findPinPadMapping(uart.SERCOM, config.CTS)
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if !ok {
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return ErrInvalidInputPin
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}
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// See table 25-9 of the datasheet (page 459) for how pads are mapped to
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// pinout values.
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if txPadOut == 1 {
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return ErrInvalidOutputPin
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}
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txPadOut = 2
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config.RTS.Configure(PinConfig{Mode: rtsPinMode})
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config.CTS.Configure(PinConfig{Mode: ctsPinMode})
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}
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// reset SERCOM0
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uart.Bus.CTRLA.SetBits(sam.SERCOM_USART_CTRLA_SWRST)
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for uart.Bus.CTRLA.HasBits(sam.SERCOM_USART_CTRLA_SWRST) ||
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@ -592,8 +615,8 @@ func (uart *UART) Configure(config UARTConfig) error {
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// set UART pads. This is not same as pins...
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// SERCOM_USART_CTRLA_TXPO(txPad) |
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// SERCOM_USART_CTRLA_RXPO(rxPad);
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uart.Bus.CTRLA.SetBits((txPinOut << sam.SERCOM_USART_CTRLA_TXPO_Pos) |
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(rxPinOut << sam.SERCOM_USART_CTRLA_RXPO_Pos))
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uart.Bus.CTRLA.SetBits((txPadOut << sam.SERCOM_USART_CTRLA_TXPO_Pos) |
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(rxPadOut << sam.SERCOM_USART_CTRLA_RXPO_Pos))
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// Enable Transceiver and Receiver
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//sercom->USART.CTRLB.reg |= SERCOM_USART_CTRLB_TXEN | SERCOM_USART_CTRLB_RXEN ;
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