From 472aecf07a2ec145d95678fd707e374647898f1f Mon Sep 17 00:00:00 2001
From: Ayke van Laethem <aykevanlaethem@gmail.com>
Date: Fri, 2 Sep 2022 15:10:00 +0200
Subject: [PATCH] targets: remove hifive1-qemu target

This target was added purely for running tests, and it is currently
unused. When I try to use it, it causes runtime exceptions.
The replacement riscv-qemu is much better behaved.

This doesn't drop support for any actual hardware, the HiFive 1 B will
remain supported.
---
 Makefile                  |  2 --
 README.md                 |  2 +-
 targets/hifive1-qemu.json |  8 --------
 targets/hifive1-qemu.ld   | 16 ----------------
 4 files changed, 1 insertion(+), 27 deletions(-)
 delete mode 100644 targets/hifive1-qemu.json
 delete mode 100644 targets/hifive1-qemu.ld

diff --git a/Makefile b/Makefile
index b7c378d9..04c3718c 100644
--- a/Makefile
+++ b/Makefile
@@ -689,8 +689,6 @@ endif
 	@$(MD5SUM) test.bin
 	$(TINYGO) build -size short -o test.hex -target=hifive1b            examples/blinky1
 	@$(MD5SUM) test.hex
-	$(TINYGO) build -size short -o test.hex -target=hifive1-qemu        examples/serial
-	@$(MD5SUM) test.hex
 	$(TINYGO) build -size short -o test.hex -target=maixbit             examples/blinky1
 	@$(MD5SUM) test.hex
 ifneq ($(WASM), 0)
diff --git a/README.md b/README.md
index 26b1df4b..d6f65159 100644
--- a/README.md
+++ b/README.md
@@ -125,7 +125,7 @@ The following 91 microcontroller boards are currently supported:
 * [Seeed LoRa-E5 Development Kit](https://www.seeedstudio.com/LoRa-E5-Dev-Kit-p-4868.html)
 * [Seeed Sipeed MAix BiT](https://www.seeedstudio.com/Sipeed-MAix-BiT-for-RISC-V-AI-IoT-p-2872.html)
 * [Seeed Wio Terminal](https://www.seeedstudio.com/Wio-Terminal-p-4509.html)
-* [SiFIve HiFive1 Rev B](https://www.sifive.com/boards/hifive1)
+* [SiFIve HiFive1 Rev B](https://www.sifive.com/boards/hifive1-rev-b)
 * [Sparkfun Thing Plus RP2040](https://www.sparkfun.com/products/17745)
 * [ST Micro "Nucleo" F103RB](https://www.st.com/en/evaluation-tools/nucleo-f103rb.html)
 * [ST Micro "Nucleo" F722ZE](https://www.st.com/en/evaluation-tools/nucleo-f722ze.html)
diff --git a/targets/hifive1-qemu.json b/targets/hifive1-qemu.json
deleted file mode 100644
index 5d2d3143..00000000
--- a/targets/hifive1-qemu.json
+++ /dev/null
@@ -1,8 +0,0 @@
-{
-	"inherits": ["fe310"],
-	"build-tags": ["hifive1b", "qemu"],
-	"serial": "uart",
-	"default-stack-size": 4096,
-	"linkerscript": "targets/hifive1-qemu.ld",
-	"emulator": "qemu-system-riscv32 -machine sifive_e -nographic -kernel {}"
-}
diff --git a/targets/hifive1-qemu.ld b/targets/hifive1-qemu.ld
deleted file mode 100644
index 67168594..00000000
--- a/targets/hifive1-qemu.ld
+++ /dev/null
@@ -1,16 +0,0 @@
-
-/* memory map:
- * https://github.com/sifive/freedom-e-sdk/blob/v201908-branch/bsp/sifive-hifive1/metal.default.lds
- * With one change: this linkerscript uses 64K RAM instead of 16K as specified
- * in metal.default.lds. Not sure why this works, but it works, and it avoids
- * out-of-memory issues when running tests.
- */
-MEMORY
-{
-    FLASH_TEXT (rw) : ORIGIN = 0x20400000, LENGTH = 0x1fc00000
-    RAM (xrw)       : ORIGIN = 0x80000000, LENGTH = 64K
-}
-
-_stack_size = 2K;
-
-INCLUDE "targets/riscv.ld"