stm32: move f103 (bluepill) to common i2c code
Этот коммит содержится в:
Kenneth Bell
Ron Evans
родитель
a075cbedf5
коммит
b5205cc3ca
4 изменённых файлов: 47 добавлений и 429 удалений
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@ -85,6 +85,6 @@ const (
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// I2C pins
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const (
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SDA_PIN = PB7
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SCL_PIN = PB6
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I2C0_SDA_PIN = PB7
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I2C0_SCL_PIN = PB6
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)
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@ -120,6 +120,6 @@ const (
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// I2C pins
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const (
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SCL_PIN = PB6
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SDA_PIN = PB7
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I2C0_SCL_PIN = PB6
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I2C0_SDA_PIN = PB7
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)
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@ -1,4 +1,4 @@
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// +build stm32,!stm32f103,!stm32f7x2,!stm32l5x2,!stm32l0
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// +build stm32,!stm32f7x2,!stm32l5x2,!stm32l0
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package machine
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@ -197,10 +197,6 @@ func (spi SPI) configurePins(config SPIConfig) {
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//---------- I2C related types and code
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type I2C struct {
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Bus *stm32.I2C_Type
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}
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// There are 2 I2C interfaces on the STM32F103xx.
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// Since the first interface is named I2C1, both I2C0 and I2C1 refer to I2C1.
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// TODO: implement I2C2.
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@ -209,451 +205,73 @@ var (
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I2C0 = I2C1
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)
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// I2CConfig is used to store config info for I2C.
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type I2CConfig struct {
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Frequency uint32
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SCL Pin
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SDA Pin
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type I2C struct {
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Bus *stm32.I2C_Type
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}
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// Configure is intended to setup the I2C interface.
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func (i2c I2C) Configure(config I2CConfig) error {
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// Default I2C bus speed is 100 kHz.
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if config.Frequency == 0 {
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config.Frequency = TWI_FREQ_100KHZ
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}
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// enable clock for I2C
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stm32.RCC.APB1ENR.SetBits(stm32.RCC_APB1ENR_I2C1EN)
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// I2C1 pins
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switch config.SDA {
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case PB9:
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config.SCL = PB8
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func (i2c I2C) configurePins(config I2CConfig) {
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if config.SDA == PB9 {
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// use alternate I2C1 pins PB8/PB9 via AFIO mapping
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_AFIOEN)
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stm32.AFIO.MAPR.SetBits(stm32.AFIO_MAPR_I2C1_REMAP)
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default:
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// use default I2C1 pins PB6/PB7
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config.SDA = SDA_PIN
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config.SCL = SCL_PIN
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}
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config.SDA.Configure(PinConfig{Mode: PinOutput50MHz + PinOutputModeAltOpenDrain})
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config.SCL.Configure(PinConfig{Mode: PinOutput50MHz + PinOutputModeAltOpenDrain})
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}
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// Disable the selected I2C peripheral to configure
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i2c.Bus.CR1.ClearBits(stm32.I2C_CR1_PE)
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func (i2c I2C) getFreqRange(config I2CConfig) uint32 {
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// pclk1 clock speed is main frequency divided by PCLK1 prescaler (div 2)
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pclk1 := CPUFrequency() / 2
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// set freqency range to PCLK1 clock speed in MHz
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// aka setting the value 36 means to use 36 MHz clock
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pclk1Mhz := pclk1 / 1000000
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i2c.Bus.CR2.SetBits(pclk1Mhz)
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switch config.Frequency {
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case TWI_FREQ_100KHZ:
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// Normal mode speed calculation
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ccr := pclk1 / (config.Frequency * 2)
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i2c.Bus.CCR.Set(ccr)
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// duty cycle 2
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i2c.Bus.CCR.ClearBits(stm32.I2C_CCR_DUTY)
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// frequency standard mode
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i2c.Bus.CCR.ClearBits(stm32.I2C_CCR_F_S)
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// Set Maximum Rise Time for standard mode
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i2c.Bus.TRISE.Set(pclk1Mhz)
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case TWI_FREQ_400KHZ:
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// Fast mode speed calculation
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ccr := pclk1 / (config.Frequency * 3)
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i2c.Bus.CCR.Set(ccr)
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// duty cycle 2
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i2c.Bus.CCR.ClearBits(stm32.I2C_CCR_DUTY)
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// frequency fast mode
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i2c.Bus.CCR.SetBits(stm32.I2C_CCR_F_S)
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// Set Maximum Rise Time for fast mode
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i2c.Bus.TRISE.Set(((pclk1Mhz * 300) / 1000))
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return pclk1 / 1000000
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}
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// re-enable the selected I2C peripheral
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_PE)
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return nil
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func (i2c I2C) getRiseTime(config I2CConfig) uint32 {
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// These bits must be programmed with the maximum SCL rise time given in the
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// I2C bus specification, incremented by 1.
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// For instance: in Sm mode, the maximum allowed SCL rise time is 1000 ns.
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// If, in the I2C_CR2 register, the value of FREQ[5:0] bits is equal to 0x08
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// and PCLK1 = 125 ns, therefore the TRISE[5:0] bits must be programmed with
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// 09h (1000 ns / 125 ns = 8 + 1)
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freqRange := i2c.getFreqRange(config)
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if config.Frequency > 100000 {
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// fast mode (Fm) adjustment
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freqRange *= 300
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freqRange /= 1000
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}
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return (freqRange + 1) << stm32.I2C_TRISE_TRISE_Pos
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}
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// Tx does a single I2C transaction at the specified address.
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// It clocks out the given address, writes the bytes in w, reads back len(r)
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// bytes and stores them in r, and generates a stop condition on the bus.
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func (i2c I2C) Tx(addr uint16, w, r []byte) error {
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var err error
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if len(w) != 0 {
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// start transmission for writing
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err = i2c.signalStart()
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if err != nil {
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return err
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}
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// send address
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err = i2c.sendAddress(uint8(addr), true)
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if err != nil {
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return err
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}
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for _, b := range w {
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err = i2c.WriteByte(b)
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if err != nil {
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return err
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}
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}
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// sending stop here for write
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err = i2c.signalStop()
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if err != nil {
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return err
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}
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}
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if len(r) != 0 {
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// re-start transmission for reading
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err = i2c.signalStart()
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if err != nil {
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return err
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}
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// 1 byte
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switch len(r) {
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case 1:
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// send address
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err = i2c.sendAddress(uint8(addr), false)
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if err != nil {
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return err
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}
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// Disable ACK of received data
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i2c.Bus.CR1.ClearBits(stm32.I2C_CR1_ACK)
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// clear timeout here
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timeout := i2cTimeout
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for !i2c.Bus.SR2.HasBits(stm32.I2C_SR2_MSL | stm32.I2C_SR2_BUSY) {
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timeout--
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if timeout == 0 {
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return errI2CWriteTimeout
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}
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}
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// Generate stop condition
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_STOP)
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timeout = i2cTimeout
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for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_RxNE) {
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timeout--
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if timeout == 0 {
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return errI2CReadTimeout
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}
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}
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// Read and return data byte from I2C data register
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r[0] = byte(i2c.Bus.DR.Get())
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// wait for stop
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return i2c.waitForStop()
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case 2:
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// enable pos
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_POS)
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// Enable ACK of received data
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_ACK)
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// send address
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err = i2c.sendAddress(uint8(addr), false)
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if err != nil {
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return err
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}
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// clear address here
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timeout := i2cTimeout
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for !i2c.Bus.SR2.HasBits(stm32.I2C_SR2_MSL | stm32.I2C_SR2_BUSY) {
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timeout--
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if timeout == 0 {
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return errI2CWriteTimeout
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}
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}
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// Disable ACK of received data
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i2c.Bus.CR1.ClearBits(stm32.I2C_CR1_ACK)
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// wait for btf. we need a longer timeout here than normal.
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timeout = 1000
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for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_BTF) {
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timeout--
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if timeout == 0 {
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return errI2CReadTimeout
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}
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}
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// Generate stop condition
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_STOP)
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// read the 2 bytes by reading twice.
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r[0] = byte(i2c.Bus.DR.Get())
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r[1] = byte(i2c.Bus.DR.Get())
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// wait for stop
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err = i2c.waitForStop()
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//disable pos
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i2c.Bus.CR1.ClearBits(stm32.I2C_CR1_POS)
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return err
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case 3:
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// Enable ACK of received data
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_ACK)
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// send address
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err = i2c.sendAddress(uint8(addr), false)
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if err != nil {
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return err
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}
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// clear address here
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timeout := i2cTimeout
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for !i2c.Bus.SR2.HasBits(stm32.I2C_SR2_MSL | stm32.I2C_SR2_BUSY) {
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timeout--
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if timeout == 0 {
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return errI2CWriteTimeout
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}
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}
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// Enable ACK of received data
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_ACK)
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// wait for btf. we need a longer timeout here than normal.
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timeout = 1000
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for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_BTF) {
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timeout--
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if timeout == 0 {
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return errI2CReadTimeout
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}
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}
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// Disable ACK of received data
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i2c.Bus.CR1.ClearBits(stm32.I2C_CR1_ACK)
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// read the first byte
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r[0] = byte(i2c.Bus.DR.Get())
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timeout = 1000
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for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_BTF) {
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timeout--
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if timeout == 0 {
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return errI2CReadTimeout
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}
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}
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// Generate stop condition
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_STOP)
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// read the last 2 bytes by reading twice.
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r[1] = byte(i2c.Bus.DR.Get())
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r[2] = byte(i2c.Bus.DR.Get())
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// wait for stop
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return i2c.waitForStop()
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default:
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// more than 3 bytes of data to read
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// send address
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err = i2c.sendAddress(uint8(addr), false)
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if err != nil {
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return err
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}
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// clear address here
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timeout := i2cTimeout
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for !i2c.Bus.SR2.HasBits(stm32.I2C_SR2_MSL | stm32.I2C_SR2_BUSY) {
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timeout--
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if timeout == 0 {
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return errI2CWriteTimeout
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}
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}
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for i := 0; i < len(r)-3; i++ {
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// Enable ACK of received data
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_ACK)
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// wait for btf. we need a longer timeout here than normal.
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timeout = 1000
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for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_BTF) {
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timeout--
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if timeout == 0 {
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return errI2CReadTimeout
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}
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}
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// read the next byte
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r[i] = byte(i2c.Bus.DR.Get())
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}
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// wait for btf. we need a longer timeout here than normal.
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timeout = 1000
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for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_BTF) {
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timeout--
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if timeout == 0 {
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return errI2CReadTimeout
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}
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}
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// Disable ACK of received data
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i2c.Bus.CR1.ClearBits(stm32.I2C_CR1_ACK)
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// get third from last byte
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r[len(r)-3] = byte(i2c.Bus.DR.Get())
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// Generate stop condition
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_STOP)
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// get second from last byte
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r[len(r)-2] = byte(i2c.Bus.DR.Get())
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timeout = i2cTimeout
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for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_RxNE) {
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timeout--
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if timeout == 0 {
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return errI2CReadTimeout
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}
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}
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// get last byte
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r[len(r)-1] = byte(i2c.Bus.DR.Get())
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// wait for stop
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return i2c.waitForStop()
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}
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}
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return nil
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}
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const i2cTimeout = 1000
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// signalStart sends a start signal.
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func (i2c I2C) signalStart() error {
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// Wait until I2C is not busy
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timeout := i2cTimeout
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for i2c.Bus.SR2.HasBits(stm32.I2C_SR2_BUSY) {
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timeout--
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if timeout == 0 {
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return errI2CSignalStartTimeout
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}
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}
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// clear stop
|
||||
i2c.Bus.CR1.ClearBits(stm32.I2C_CR1_STOP)
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// Generate start condition
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i2c.Bus.CR1.SetBits(stm32.I2C_CR1_START)
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// Wait for I2C EV5 aka SB flag.
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timeout = i2cTimeout
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||||
for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_SB) {
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timeout--
|
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if timeout == 0 {
|
||||
return errI2CSignalStartTimeout
|
||||
}
|
||||
}
|
||||
|
||||
return nil
|
||||
}
|
||||
|
||||
// signalStop sends a stop signal and waits for it to succeed.
|
||||
func (i2c I2C) signalStop() error {
|
||||
// Generate stop condition
|
||||
i2c.Bus.CR1.SetBits(stm32.I2C_CR1_STOP)
|
||||
|
||||
// wait for stop
|
||||
return i2c.waitForStop()
|
||||
}
|
||||
|
||||
// waitForStop waits after a stop signal.
|
||||
func (i2c I2C) waitForStop() error {
|
||||
// Wait until I2C is stopped
|
||||
timeout := i2cTimeout
|
||||
for i2c.Bus.SR1.HasBits(stm32.I2C_SR1_STOPF) {
|
||||
timeout--
|
||||
if timeout == 0 {
|
||||
return errI2CSignalStopTimeout
|
||||
}
|
||||
}
|
||||
|
||||
return nil
|
||||
}
|
||||
|
||||
// Send address of device we want to talk to
|
||||
func (i2c I2C) sendAddress(address uint8, write bool) error {
|
||||
data := (address << 1)
|
||||
if !write {
|
||||
data |= 1 // set read flag
|
||||
}
|
||||
|
||||
i2c.Bus.DR.Set(uint32(data))
|
||||
|
||||
// Wait for I2C EV6 event.
|
||||
// Destination device acknowledges address
|
||||
timeout := i2cTimeout
|
||||
if write {
|
||||
// EV6 which is ADDR flag.
|
||||
for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_ADDR) {
|
||||
timeout--
|
||||
if timeout == 0 {
|
||||
return errI2CWriteTimeout
|
||||
}
|
||||
}
|
||||
|
||||
timeout = i2cTimeout
|
||||
for !i2c.Bus.SR2.HasBits(stm32.I2C_SR2_MSL | stm32.I2C_SR2_BUSY | stm32.I2C_SR2_TRA) {
|
||||
timeout--
|
||||
if timeout == 0 {
|
||||
return errI2CWriteTimeout
|
||||
}
|
||||
func (i2c I2C) getSpeed(config I2CConfig) uint32 {
|
||||
ccr := func(pclk uint32, freq uint32, coeff uint32) uint32 {
|
||||
return (((pclk - 1) / (freq * coeff)) + 1) & stm32.I2C_CCR_CCR_Msk
|
||||
}
|
||||
sm := func(pclk uint32, freq uint32) uint32 { // standard mode (Sm)
|
||||
if s := ccr(pclk, freq, 2); s < 4 {
|
||||
return 4
|
||||
} else {
|
||||
// I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED which is ADDR flag.
|
||||
for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_ADDR) {
|
||||
timeout--
|
||||
if timeout == 0 {
|
||||
return errI2CWriteTimeout
|
||||
return s
|
||||
}
|
||||
}
|
||||
fm := func(pclk uint32, freq uint32, duty uint8) uint32 { // fast mode (Fm)
|
||||
if duty == DutyCycle2 {
|
||||
return ccr(pclk, freq, 3)
|
||||
} else {
|
||||
return ccr(pclk, freq, 25) | stm32.I2C_CCR_DUTY
|
||||
}
|
||||
}
|
||||
clock := CPUFrequency() / 2
|
||||
if config.Frequency <= 100000 {
|
||||
return sm(clock, config.Frequency)
|
||||
} else {
|
||||
s := fm(clock, config.Frequency, config.DutyCycle)
|
||||
if (s & stm32.I2C_CCR_CCR_Msk) == 0 {
|
||||
return 1
|
||||
} else {
|
||||
return s | stm32.I2C_CCR_F_S
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return nil
|
||||
}
|
||||
|
||||
// WriteByte writes a single byte to the I2C bus.
|
||||
func (i2c I2C) WriteByte(data byte) error {
|
||||
// Send data byte
|
||||
i2c.Bus.DR.Set(uint32(data))
|
||||
|
||||
// Wait for I2C EV8_2 when data has been physically shifted out and
|
||||
// output on the bus.
|
||||
// I2C_EVENT_MASTER_BYTE_TRANSMITTED is TXE flag.
|
||||
timeout := i2cTimeout
|
||||
for !i2c.Bus.SR1.HasBits(stm32.I2C_SR1_TxE) {
|
||||
timeout--
|
||||
if timeout == 0 {
|
||||
return errI2CWriteTimeout
|
||||
}
|
||||
}
|
||||
|
||||
return nil
|
||||
}
|
||||
|
|
|
|||
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