diff --git a/Makefile b/Makefile index e5203c5f..51ff3cde 100644 --- a/Makefile +++ b/Makefile @@ -453,6 +453,8 @@ ifneq ($(STM32), 0) @$(MD5SUM) test.hex $(TINYGO) build -size short -o test.hex -target=stm32f4disco-1 examples/pwm @$(MD5SUM) test.hex + $(TINYGO) build -size short -o test.hex -target=stm32f469disco examples/blinky1 + @$(MD5SUM) test.hex $(TINYGO) build -size short -o test.hex -target=lorae5 examples/blinky1 @$(MD5SUM) test.hex endif diff --git a/README.md b/README.md index 8d132cac..b1b5f515 100644 --- a/README.md +++ b/README.md @@ -43,7 +43,7 @@ See the [getting started instructions](https://tinygo.org/getting-started/) for You can compile TinyGo programs for microcontrollers, WebAssembly and Linux. -The following 75 microcontroller boards are currently supported: +The following 76 microcontroller boards are currently supported: * [Adafruit Circuit Playground Bluefruit](https://www.adafruit.com/product/4333) * [Adafruit Circuit Playground Express](https://www.adafruit.com/product/3333) @@ -118,6 +118,7 @@ The following 75 microcontroller boards are currently supported: * [ST Micro "Nucleo" WL55JC](https://www.st.com/en/evaluation-tools/nucleo-wl55jc.html) * [ST Micro STM32F103XX "Bluepill"](https://stm32-base.org/boards/STM32F103C8T6-Blue-Pill) * [ST Micro STM32F407 "Discovery"](https://www.st.com/en/evaluation-tools/stm32f4discovery.html) +* [ST Micro STM32F469 "Discovery"](https://www.st.com/content/st_com/en/products/evaluation-tools/product-evaluation-tools/mcu-mpu-eval-tools/stm32-mcu-mpu-eval-tools/stm32-discovery-kits/32f469idiscovery.html) * [X9 Pro smartwatch](https://github.com/curtpw/nRF5x-device-reverse-engineering/tree/master/X9-nrf52832-activity-tracker/) * [The Things Industries Generic Node Sensor Edition](https://www.genericnode.com/docs/sensor-edition/) diff --git a/src/machine/board_stm32f469disco.go b/src/machine/board_stm32f469disco.go new file mode 100644 index 00000000..db20aca7 --- /dev/null +++ b/src/machine/board_stm32f469disco.go @@ -0,0 +1,79 @@ +// +build stm32f469disco + +package machine + +import ( + "device/stm32" + "runtime/interrupt" +) + +const ( + LED = LED_BUILTIN + LED1 = LED_GREEN + LED2 = LED_ORANGE + LED3 = LED_RED + LED4 = LED_BLUE + LED_BUILTIN = LED_GREEN + LED_GREEN = PG6 + LED_ORANGE = PD4 + LED_RED = PD5 + LED_BLUE = PK3 +) + +const ( + BUTTON = PA0 +) + +// UART pins +const ( + UART_TX_PIN = PB10 + UART_RX_PIN = PB11 +) + +var ( + UART3 = &_UART3 + _UART3 = UART{ + Buffer: NewRingBuffer(), + Bus: stm32.USART3, + TxAltFuncSelector: AF7_USART1_2_3, + RxAltFuncSelector: AF7_USART1_2_3, + } + DefaultUART = UART3 +) + +// set up RX IRQ handler. Follow similar pattern for other UARTx instances +func init() { + UART3.Interrupt = interrupt.New(stm32.IRQ_USART3, _UART3.handleInterrupt) +} + +// SPI pins +const ( + SPI1_SCK_PIN = PA5 + SPI1_SDI_PIN = PA6 + SPI1_SDO_PIN = PA7 + SPI0_SCK_PIN = SPI1_SCK_PIN + SPI0_SDI_PIN = SPI1_SDI_PIN + SPI0_SDO_PIN = SPI1_SDO_PIN +) + +// Since the first interface is named SPI1, both SPI0 and SPI1 refer to SPI1. +// TODO: implement SPI2 and SPI3. +var ( + SPI0 = SPI{ + Bus: stm32.SPI1, + AltFuncSelector: AF5_SPI1_SPI2, + } + SPI1 = &SPI0 +) + +const ( + I2C0_SCL_PIN = PB6 + I2C0_SDA_PIN = PB9 +) + +var ( + I2C0 = &I2C{ + Bus: stm32.I2C1, + AltFuncSelector: AF4_I2C1_2_3, + } +) diff --git a/src/machine/machine_stm32f4.go b/src/machine/machine_stm32f4.go index 22ac4440..dd8a0ad7 100644 --- a/src/machine/machine_stm32f4.go +++ b/src/machine/machine_stm32f4.go @@ -616,16 +616,6 @@ func initRNG() { stm32.RNG.CR.SetBits(stm32.RNG_CR_RNGEN) } -func CPUFrequency() uint32 { - return 168000000 -} - -// Internal use: configured speed of the APB1 and APB2 timers, this should be kept -// in sync with any changes to runtime package which configures the oscillators -// and clock frequencies -const APB1_TIM_FREQ = 42000000 * 2 -const APB2_TIM_FREQ = 84000000 * 2 - // Alternative peripheral pin functions const ( AF0_SYSTEM = 0 diff --git a/src/machine/machine_stm32f40x.go b/src/machine/machine_stm32f40x.go new file mode 100644 index 00000000..42ddb94a --- /dev/null +++ b/src/machine/machine_stm32f40x.go @@ -0,0 +1,15 @@ +//go:build stm32f4 && (stm32f405 || stm32f407) +// +build stm32f4 +// +build stm32f405 stm32f407 + +package machine + +func CPUFrequency() uint32 { + return 168000000 +} + +// Internal use: configured speed of the APB1 and APB2 timers, this should be kept +// in sync with any changes to runtime package which configures the oscillators +// and clock frequencies +const APB1_TIM_FREQ = 42000000 * 2 +const APB2_TIM_FREQ = 84000000 * 2 diff --git a/src/machine/machine_stm32f469.go b/src/machine/machine_stm32f469.go new file mode 100644 index 00000000..d8f86d5e --- /dev/null +++ b/src/machine/machine_stm32f469.go @@ -0,0 +1,14 @@ +//go:build stm32f4 && stm32f469 +// +build stm32f4,stm32f469 + +package machine + +func CPUFrequency() uint32 { + return 180000000 +} + +// Internal use: configured speed of the APB1 and APB2 timers, this should be kept +// in sync with any changes to runtime package which configures the oscillators +// and clock frequencies +const APB1_TIM_FREQ = 45000000 * 2 +const APB2_TIM_FREQ = 90000000 * 2 diff --git a/src/runtime/runtime_stm32f469.go b/src/runtime/runtime_stm32f469.go new file mode 100644 index 00000000..56900e3b --- /dev/null +++ b/src/runtime/runtime_stm32f469.go @@ -0,0 +1,28 @@ +//go:build stm32f4 && stm32f469 +// +build stm32f4,stm32f469 + +package runtime + +import "device/stm32" + +/* + clock settings + +-------------+--------+ + | HSE | 8mhz | + | SYSCLK | 180mhz | + | HCLK | 180mhz | + | APB2(PCLK2) | 90mhz | + | APB1(PCLK1) | 45mhz | + +-------------+--------+ +*/ +const ( + HSE_STARTUP_TIMEOUT = 0x0500 + // PLL Options - See RM0386 Reference Manual pg. 148 + PLL_M = 8 // PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N + PLL_N = 360 + PLL_P = 2 // SYSCLK = PLL_VCO / PLL_P + PLL_Q = 7 // USB OTS FS, SDIO and RNG Clock = PLL_VCO / PLL_Q + PLL_R = 6 // DSI + PLL_CFGR = PLL_M | (PLL_N << stm32.RCC_PLLCFGR_PLLN_Pos) | (((PLL_P >> 1) - 1) << stm32.RCC_PLLCFGR_PLLP_Pos) | + (1 << stm32.RCC_PLLCFGR_PLLSRC_Pos) | (PLL_Q << stm32.RCC_PLLCFGR_PLLQ_Pos) | (PLL_R << stm32.RCC_PLLCFGR_PLLR_Pos) +) diff --git a/targets/stm32f469.ld b/targets/stm32f469.ld new file mode 100644 index 00000000..ae559548 --- /dev/null +++ b/targets/stm32f469.ld @@ -0,0 +1,10 @@ + +MEMORY +{ + FLASH_TEXT (rw) : ORIGIN = 0x08000000, LENGTH = 2M + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K +} + +_stack_size = 4K; + +INCLUDE "targets/arm.ld" diff --git a/targets/stm32f469disco.json b/targets/stm32f469disco.json new file mode 100644 index 00000000..37deaa3a --- /dev/null +++ b/targets/stm32f469disco.json @@ -0,0 +1,12 @@ +{ + "inherits": ["cortex-m4"], + "build-tags": ["stm32f469disco", "stm32f469", "stm32f4", "stm32"], + "serial": "uart", + "linkerscript": "targets/stm32f469.ld", + "extra-files": [ + "src/device/stm32/stm32f469.s" + ], + "flash-method": "openocd", + "openocd-interface": "stlink", + "openocd-target": "stm32f4x" +}