These all-caps constants aren't in the Go style, so rename it to
CPUFrequency (which is more aligned with Go style). Additionally, make
it a function so that it is possible to add support for changing the
frequency in the future.
Tested by running `make smoketest`. None of the outputs did change.
This should make it more maintainable. Another big advantage that
generation time (including gofmt) is now 3 times faster. No real attempt
at refactoring has been made, that will need to be done at a later time.
The Cortex-M architecture contains two stack pointers, designed to be
used by RTOSes: MSP and PSP (where MSP is the default at reset). In
fact, the ARM documentation recommends using the PSP for tasks in a
RTOS.
This commit switches to using the PSP for goroutine stacks. Aside from
being the recommended operation, this has the big advantage that the
NVIC automatically switches to the MSP when handling interrupts. This
avoids having to make every goroutine stack big enough that interrupts
can be handled on it.
Additionally, I've optimized the assembly code to save/restore registers
(made possible by this change). For Cortex-M3 and up, saving all
registers is just a single push instruction and restoring+branching is a
single pop instruction. For Cortex-M0 it's a bit more work because the
push/pop instructions there don't support most high registers.
Sidenote: the fact that you can pop a number of registers and branch at
the same time makes ARM not exactly a true RISC system. However, it's
very useful in this case.
This function adjusts the time returned by time.Now() and similar
functions. This is necessary on bare metal systems, where there would
not be a way to adjust the time otherwise.
This smartwatch doesn't have an on-board debugger, so I picked the one I
was using while getting this smartwatch to run Go programs (the J-Link
EDU Mini).
* machine/samd51: pin method cleanups.
- Use bit-math to select the group in Pin methods.
- Move Pin methods to atsamd51. They are not chip-specific, they apply to the whole atsamd51 family.
- Move the group/pin-id calculation into a helper method.
- Add a Pin.Toggle() method.
* device/arm: add system timer registers
Add SYST registers and bit definitions to device/arm.
Add a setup function.
Add an example that uses it to blink an LED.
* runtime/atsamd51: fix clock init code
The DPLL0 initialization should set LDRFRAC and LDR, not LDRFRAC twice.
Also explain what the magic numbers are doing.
Comparing slices against nil currently causes the slice to escape, due
to a limitation in LLVM 8. This leads to lots of unnecessary heap
allocations. With LLVM 9 and some modifications to TinyGo, this should
be fixed. However, this commit is an easy win right now.
Returning an error when both slices are nil is not necessary, when the
check is left out it should just do nothing.
For updating an SPI screen using the st7735 driver, this results in a
~7% performance win.
Instead of configuring machine.I2C0, machine.I2C1, etc. statically,
allow the pins to be set using machine.I2CConfig. This will also
automatically configure the correct pin mode for each pin instead of
having to specify that manually.
An optimization introduced in a04db67ea9
seems to have broken arduino uno compiled hex. Setting optimzation
flags to 1, 2, or s builds proper hex binaries though.
These patches have been the result of troubleshooting over slack:
> @aykevl
> that preinit also doesn't look right. Can you try this variant,
> with 8-bit stores instead of 32-bit stores?
> There might be some alignment issue: the _ebss might not be
> aligned resulting in ptr != unsafe.Pointer(&_ebss) never being true.
Co-authored-by: Ayke van Laethem <aykevanlaethem@gmail.com>
Co-authored-by: Jaden Weiss <jadr2ddude@gmail.com>
