Граф коммитов

3 коммитов

Автор SHA1 Сообщение Дата
Ayke van Laethem
78fec3719f all: add target-features string to all targets
This makes sure that the LLVM target features match the one generated by
Clang:

  - This fixes a bug introduced when setting the target CPU for all
    targets: Cortex-M4 would now start using floating point operations
    while they were disabled in C.
  - This will make it possible in the future to inline C functions in Go
    and vice versa. This will need some more work though.

There is a code size impact. Cortex-M4 targets are increased slightly in
binary size while Cortex-M0 targets tend to be reduced a little bit.
Other than that, there is little impact.
2021-11-07 09:26:46 +01:00
Yannis Huber
2396c22658
risc-v: add support for 64-bit RISC-V CPUs 2020-06-08 16:47:39 +02:00
Ayke van Laethem
980068543a riscv: implement VirtIO target
This allows running RISC-V tests in CI using QEMU, which should help
catch bugs.
2020-03-26 23:03:55 +01:00