// +build esp32 package runtime import ( "device" "device/esp" "machine" "unsafe" ) type timeUnit int64 var currentTime timeUnit func putchar(c byte) { machine.UART0.WriteByte(c) } func postinit() {} // This is the function called on startup right after the stack pointer has been // set. //export main func main() { // Disable both watchdog timers that are enabled by default on startup. // Note that these watchdogs can be protected, but the ROM bootloader // doesn't seem to protect them. esp.RTCCNTL.WDTCONFIG0.Set(0) esp.TIMG0.WDTCONFIG0.Set(0) // Switch SoC clock source to PLL (instead of the default which is XTAL). // This switches the CPU (and APB) clock from 40MHz to 80MHz. // Options: // RTCCNTL_CLK_CONF_SOC_CLK_SEL: PLL (default XTAL) // RTCCNTL_CLK_CONF_CK8M_DIV_SEL: 2 (default) // RTCCNTL_CLK_CONF_DIG_CLK8M_D256_EN: Enable (default) // RTCCNTL_CLK_CONF_CK8M_DIV: DIV256 (default) // The only real change made here is modifying RTCCNTL_CLK_CONF_SOC_CLK_SEL, // but setting a fixed value produces smaller code. esp.RTCCNTL.CLK_CONF.Set((esp.RTCCNTL_CLK_CONF_SOC_CLK_SEL_PLL << esp.RTCCNTL_CLK_CONF_SOC_CLK_SEL_Pos) | (2 << esp.RTCCNTL_CLK_CONF_CK8M_DIV_SEL_Pos) | (esp.RTCCNTL_CLK_CONF_DIG_CLK8M_D256_EN_Enable << esp.RTCCNTL_CLK_CONF_DIG_CLK8M_D256_EN_Pos) | (esp.RTCCNTL_CLK_CONF_CK8M_DIV_DIV256 << esp.RTCCNTL_CLK_CONF_CK8M_DIV_Pos)) // Switch CPU from 80MHz to 160MHz. This doesn't affect the APB clock, // which is still running at 80MHz. esp.DPORT.CPU_PER_CONF.Set(esp.DPORT_CPU_PER_CONF_CPUPERIOD_SEL_SEL_160) // Clear .bss section. .data has already been loaded by the ROM bootloader. // Do this after increasing the CPU clock to possibly make startup slightly // faster. preinit() // Initialize UART. machine.UART0.Configure(machine.UARTConfig{}) // Configure timer 0 in timer group 0, for timekeeping. // EN: Enable the timer. // INCREASE: Count up every tick (as opposed to counting down). // DIVIDER: 16-bit prescaler, set to 2 for dividing the APB clock by two // (40MHz). esp.TIMG0.T0CONFIG.Set(esp.TIMG_T0CONFIG_T0_EN | esp.TIMG_T0CONFIG_T0_INCREASE | 2<