62 строки
1,3 КиБ
ArmAsm
62 строки
1,3 КиБ
ArmAsm
.section .isr
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isr:
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rjmp reset
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.org 0x18 ; WDT
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rjmp wdt
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; Startup code
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.section .reset
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.org 26
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reset:
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clr r1 ; r1 is expected to be 0 by the C calling convention
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; Zero .bss
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clear_bss:
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ldi xl, lo8(_sbss)
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ldi xh, hi8(_sbss)
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clear_bss_loop:
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ldi yl, lo8(_ebss)
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ldi yh, hi8(_ebss)
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cp xl, yl ; if x == y
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cpc xh, yh
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breq clear_bss_end
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st x+, r1 ; zero byte in *x
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rjmp clear_bss_loop
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clear_bss_end:
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; Set up the stack pointer.
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ldi xl, lo8(_stack_top)
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ldi xh, hi8(_stack_top)
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out 0x3d, xl; SPL
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out 0x3e, xh; SPH
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; Enable interrupts.
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; TODO: make sure interrupts are started after all initializers have run.
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sei
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; main will be placed right after here by the linker script so there's no
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; need to jump.
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; The only thing this WDT handler really does is disable itself, to get out of
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; sleep mode.
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.section .text.wdt
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wdt:
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push r16
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clr r16
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wdr ; Reset watchdog
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out 0x34, r16 ; Clear reset reason (MCUSR)
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; part 1: set WDCE and WDE to enable editing WDTCSR
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lds r16, 0x60 ; r16 = WDTCSR
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ori r16, 0x18 ; r16 |= WDCE | WDE
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sts 0x60, r16 ; WDTCSR = r16
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; part 2: within 4 clock cycles, set the new value for WDTCSR
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clr r16
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sts 0x60, r16 ; WDTCSR = 0
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pop r16
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reti
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