cb147b9475
This change adds support for the ESP32-C3, a new chip from Espressif. It is a RISC-V core so porting was comparatively easy. Most peripherals are shared with the (original) ESP32 chip, but with subtle differences. Also, the SVD file I've used gives some peripherals/registers a different name which makes sharing code harder. Eventually, when an official SVD file for the ESP32 is released, I expect that a lot of code can be shared between the two chips. More information: https://www.espressif.com/en/products/socs/esp32-c3 TODO: - stack scheduler - interrupts - most peripherals (SPI, I2C, PWM, etc)
49 строки
2,1 КиБ
ArmAsm
49 строки
2,1 КиБ
ArmAsm
// This is a very minimal bootloader for the ESP32-C3. It only initializes the
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// flash and then continues with the generic RISC-V initialization code, which
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// in turn will call runtime.main.
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// It is written in assembly (and not in a higher level language) to make sure
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// it is entirely loaded into IRAM and doesn't accidentally call functions
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// stored in IROM.
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//
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// For reference, here is a nice introduction into RISC-V assembly:
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// https://www.imperialviolet.org/2016/12/31/riscv.html
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.section .init
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.global call_start_cpu0
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.type call_start_cpu0,@function
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call_start_cpu0:
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// At this point:
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// - The ROM bootloader is finished and has jumped to here.
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// - We're running from IRAM: both IRAM and DRAM segments have been loaded
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// by the ROM bootloader.
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// - We have a usable stack (but not the one we would like to use).
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// - No flash mappings (MMU) are set up yet.
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// Reset MMU, see bootloader_reset_mmu in the ESP-IDF.
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call Cache_Suspend_ICache
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mv s0, a0 // autoload value
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call Cache_Invalidate_ICache_All
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call Cache_MMU_Init
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// Set up DROM from flash.
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// Somehow, this also sets up IROM from flash. Not sure why, but it avoids
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// the need for another such call.
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// C equivalent:
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// Cache_Dbus_MMU_Set(MMU_ACCESS_FLASH, 0x3C00_0000, 0, 64, 128, 0)
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li a0, 0 // ext_ram: MMU_ACCESS_FLASH
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li a1, 0x3C000000 // vaddr: address in the data bus
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li a2, 0 // paddr: physical address in the flash chip
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li a3, 64 // psize: always 64 (kilobytes)
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li a4, 128 // num: pages to be set (8192K / 64K = 128)
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li a5, 0 // fixed
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call Cache_Dbus_MMU_Set
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// Enable the flash cache.
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mv a0, s0 // restore autoload value from Cache_Suspend_ICache call
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call Cache_Resume_ICache
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// Jump to generic RISC-V initialization, which initializes the stack
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// pointer and globals register. It should not return.
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// (It appears that the linker relaxes this jump and instead inserts the
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// _start function right after here).
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j _start
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