8687f3f8f4
Thanks to Kyle Lemons for the inspiration and original design. The implementation in this commit is very different however, building on top of the software vectoring needed in RISC-V. The result is a flexible interrupt handler that does not take up any RAM for configuration.
83 строки
2 КиБ
Text
83 строки
2 КиБ
Text
OUTPUT_ARCH(arm)
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ENTRY(_start)
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/* Note: iwram is reduced by 96 bytes because the last part of that RAM
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* (starting at 0x03007FA0) is used for interrupt handling.
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*/
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MEMORY {
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ewram : ORIGIN = 0x02000000, LENGTH = 256K /* on-board work RAM (2 wait states) */
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iwram : ORIGIN = 0x03000000, LENGTH = 32K-96 /* in-chip work RAM (faster) */
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rom : ORIGIN = 0x08000000, LENGTH = 32M /* flash ROM */
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}
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__stack_size_irq = 1K;
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__stack_size_usr = 2K;
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SECTIONS
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{
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.text :
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{
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KEEP (*(.init))
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*(.text)
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. = ALIGN(4);
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} >rom
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata)
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*(.rodata*)
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. = ALIGN(4);
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} >rom
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/* Put the stack at the bottom of RAM, so that the application will
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* crash on stack overflow instead of silently corrupting memory.
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* See: http://blog.japaric.io/stack-overflow-protection/ */
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.stack (NOLOAD) :
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{
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. = ALIGN(4);
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_stack_top_irq = .;
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. += __stack_size_irq;
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_stack_top = .;
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. += __stack_size_usr;
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} >iwram
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/* Start address (in flash) of .data, used by startup code. */
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_sidata = LOADADDR(.data);
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/* Globals with initial value */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* used by startup code */
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*(.data)
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*(.data*)
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*(.iwram .iwram.*)
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. = ALIGN(4);
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_edata = .; /* used by startup code */
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} >iwram AT>rom
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/* Zero-initialized globals */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .; /* used by startup code */
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* used by startup code */
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} >iwram
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/DISCARD/ :
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{
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*(.ARM.exidx) /* causes 'no memory region specified' error in lld */
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*(.ARM.exidx.*) /* causes spurious 'undefined reference' errors */
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}
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}
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/* For the memory allocator. */
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_heap_start = ORIGIN(ewram);
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_heap_end = ORIGIN(ewram) + LENGTH(ewram);
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_globals_start = _sdata;
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_globals_end = _ebss;
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