Добавлена поддержка Skidl Interface()ов
Этот коммит содержится в:
родитель
48c5050447
коммит
ff23ef5708
2 изменённых файлов: 43 добавлений и 3 удалений
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@ -253,8 +253,6 @@ func handleFuncDecl(decl ast.Decl) string {
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}
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}
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code += "def "
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code += "def "
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name := ""
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name := ""
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code += handleFuncDeclType(fd.Type)
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code += ""
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name = handleFuncDeclName(fd.Name)
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name = handleFuncDeclName(fd.Name)
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if name == "NewController" {
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if name == "NewController" {
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return ""
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return ""
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@ -314,7 +312,7 @@ func handleFuncDeclParams(t *ast.FuncType) string {
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ftype = handleIdent(ft)
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ftype = handleIdent(ft)
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}
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}
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for _, names := range field.Names {
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for _, names := range field.Names {
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values = append(values, ftype+""+names.Name)
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values = append(values, names.Name)
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}
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}
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}
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}
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code += strings.Join(values, ",")
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code += strings.Join(values, ",")
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@ -376,6 +376,48 @@ def vdiv(inp,outp,param):
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def main():
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def main():
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v = vdiv(inp,outp,"500")
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v = vdiv(inp,outp,"500")
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main()
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main()
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`
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Compare(source, expected)
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})
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It("Interfaces", func() {
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source := `package test
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//@subcircuit
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func mem_module(intfc any) {
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ram := Part("Memory_RAM", "AS6C1616")
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ram["A[0:19]"] += intfc.addr
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ram["DQ[0:15]"] += intfc.data
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ram["WE#"] += intfc.wr
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ram["OE#"] += intfc["rd"]
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}
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func main() {
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rd := Net("MEM_RD#")
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wr := Net("MEM_WR#")
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addr := Bus("MEM_ADDR", 20)
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data := Bus("MEM_DATA", 16)
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mem_intfc = Interface(rd, wr, addr, data)
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mem_module(mem_intfc)
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uc_module(clk, mem_intfc, io_intfc)
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}
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`
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expected := `from skidl import *
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@subcircuit
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def mem_module(intfc):
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ram = Part("Memory_RAM","AS6C1616")
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ram["A[0:19]"] += intfc.addr
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ram["DQ[0:15]"] += intfc.data
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ram["WE#"] += intfc.wr
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ram["OE#"] += intfc["rd"]
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def main():
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rd = Net("MEM_RD#")
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wr = Net("MEM_WR#")
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addr = Bus("MEM_ADDR",20)
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data = Bus("MEM_DATA",16)
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mem_intfc = Interface(rd,wr,addr,data)
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mem_module(mem_intfc)
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uc_module(clk,mem_intfc,io_intfc)
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main()
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`
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`
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Compare(source, expected)
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Compare(source, expected)
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})
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})
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