all: use less magic in memory-mapped IO
Don't store addresses in the values of registers, this leads to problems with char arrays (among others). Instead, do it like it's done in C with raw addresses cast to struct pointers. This commit also splits gen-device.py, as AVR and ARM have very different ideas of what a register is. It's easier to just keep them separate.
Этот коммит содержится в:
Ayke van Laethem
родитель
93248c93ed
коммит
17b5b6ec5b
7 изменённых файлов: 296 добавлений и 209 удалений
4
Makefile
4
Makefile
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|
@ -80,11 +80,11 @@ fmt:
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gen-device: gen-device-nrf
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gen-device-nrf:
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./gen-device.py lib/nrfx/mdk/ src/device/nrf/
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./gen-device-svd.py lib/nrfx/mdk/ src/device/nrf/
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go fmt ./src/device/nrf
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gen-device-avr:
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./gen-device.py lib/avr/packs/atmega src/device/avr/
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./gen-device-avr.py lib/avr/packs/atmega src/device/avr/
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go fmt ./src/device/avr
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23
compiler.go
23
compiler.go
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@ -1421,15 +1421,12 @@ func (c *Compiler) parseInstr(frame *Frame, instr ssa.Instruction) error {
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if err != nil {
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return err
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}
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store := c.builder.CreateStore(llvmVal, llvmAddr)
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valType := instr.Addr.Type().(*types.Pointer).Elem()
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if valType, ok := valType.(*types.Named); ok && valType.Obj().Name() == "__reg" {
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// Magic type name to transform this store to a register store.
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registerAddr := c.builder.CreateLoad(llvmAddr, "")
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ptr := c.builder.CreateIntToPtr(registerAddr, llvmAddr.Type(), "")
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store := c.builder.CreateStore(llvmVal, ptr)
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// Magic type name to make this store volatile, for memory-mapped
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// registers.
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store.SetVolatile(true)
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} else {
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c.builder.CreateStore(llvmVal, llvmAddr)
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}
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return nil
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default:
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@ -2739,19 +2736,13 @@ func (c *Compiler) parseUnOp(frame *Frame, unop *ssa.UnOp) (llvm.Value, error) {
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}
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case token.MUL: // *x, dereference pointer
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valType := unop.X.Type().(*types.Pointer).Elem()
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load := c.builder.CreateLoad(x, "")
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if valType, ok := valType.(*types.Named); ok && valType.Obj().Name() == "__reg" {
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// Magic type name: treat the value as a register pointer.
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register := unop.X.(*ssa.FieldAddr)
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global := register.X.(*ssa.Global)
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llvmGlobal := c.ir.GetGlobal(global).llvmGlobal
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llvmAddr := c.builder.CreateExtractValue(llvmGlobal.Initializer(), register.Field, "")
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ptr := llvm.ConstIntToPtr(llvmAddr, x.Type())
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load := c.builder.CreateLoad(ptr, "")
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// Magic type name to make this load volatile, for memory-mapped
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// registers.
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load.SetVolatile(true)
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return load, nil
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} else {
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return c.builder.CreateLoad(x, ""), nil
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}
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return load, nil
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case token.XOR: // ^x, toggle all bits in integer
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return c.builder.CreateXor(x, llvm.ConstInt(x.Type(), ^uint64(0), false), ""), nil
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default:
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|
|
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217
gen-device-avr.py
Исполняемый файл
217
gen-device-avr.py
Исполняемый файл
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@ -0,0 +1,217 @@
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#!/usr/bin/python3
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import sys
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import os
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from xml.dom import minidom
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from glob import glob
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from collections import OrderedDict
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import re
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class Device:
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# dummy
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pass
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def getText(element):
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strings = []
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for node in element.childNodes:
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if node.nodeType == node.TEXT_NODE:
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strings.append(node.data)
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return ''.join(strings)
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def formatText(text):
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text = re.sub('[ \t\n]+', ' ', text) # Collapse whitespace (like in HTML)
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text = text.replace('\\n ', '\n')
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text = text.strip()
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return text
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def readATDF(path):
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# Read Atmel device descriptor files.
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# See: http://packs.download.atmel.com
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device = Device()
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xml = minidom.parse(path)
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device = xml.getElementsByTagName('device')[0]
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deviceName = device.getAttribute('name')
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arch = device.getAttribute('architecture')
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family = device.getAttribute('family')
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|
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memorySizes = {}
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for el in device.getElementsByTagName('address-space'):
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addressSpace = {
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'size': int(el.getAttribute('size'), 0),
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'segments': {},
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}
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memorySizes[el.getAttribute('name')] = addressSpace
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for segmentEl in el.getElementsByTagName('memory-segment'):
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addressSpace['segments'][segmentEl.getAttribute('name')] = int(segmentEl.getAttribute('size'), 0)
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device.interrupts = []
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for el in device.getElementsByTagName('interrupts')[0].getElementsByTagName('interrupt'):
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device.interrupts.append({
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'index': int(el.getAttribute('index')),
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'name': el.getAttribute('name'),
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'description': el.getAttribute('caption'),
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})
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allRegisters = {}
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commonRegisters = {}
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device.peripherals = []
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for el in xml.getElementsByTagName('modules')[0].getElementsByTagName('module'):
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peripheral = {
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'name': el.getAttribute('name'),
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'description': el.getAttribute('caption'),
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'registers': [],
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}
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device.peripherals.append(peripheral)
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for regElGroup in el.getElementsByTagName('register-group'):
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for regEl in regElGroup.getElementsByTagName('register'):
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size = int(regEl.getAttribute('size'))
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regName = regEl.getAttribute('name')
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regOffset = int(regEl.getAttribute('offset'), 0)
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reg = {
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'description': regEl.getAttribute('caption'),
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'bitfields': [],
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'array': None,
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}
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if size == 1:
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reg['variants'] = [{
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'name': regName,
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'address': regOffset,
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}]
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elif size == 2:
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reg['variants'] = [{
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'name': regName + 'L',
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'address': regOffset,
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}, {
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'name': regName + 'H',
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'address': regOffset + 1,
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}]
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else:
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# TODO
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continue
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for bitfieldEl in regEl.getElementsByTagName('bitfield'):
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reg['bitfields'].append({
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'name': regName + '_' + bitfieldEl.getAttribute('name'),
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'description': bitfieldEl.getAttribute('caption'),
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'value': int(bitfieldEl.getAttribute('mask'), 0),
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})
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if regName in allRegisters:
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firstReg = allRegisters[regName]
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if firstReg['register'] in firstReg['peripheral']['registers']:
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firstReg['peripheral']['registers'].remove(firstReg['register'])
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if firstReg['address'] != regOffset:
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continue # TODO
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commonRegisters = allRegisters[regName]['register']
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continue
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else:
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allRegisters[regName] = {'address': regOffset, 'register': reg, 'peripheral': peripheral}
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peripheral['registers'].append(reg)
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device.metadata = {
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'file': os.path.basename(path),
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'descriptorSource': 'http://packs.download.atmel.com/',
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'name': deviceName,
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'nameLower': deviceName.lower(),
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'description': 'Device information for the {}.'.format(deviceName),
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'arch': arch,
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'family': family,
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'flashSize': memorySizes['prog']['size'],
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'ramSize': memorySizes['data']['segments'].get('IRAM', memorySizes['data']['segments'].get('INTERNAL_SRAM')),
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'numInterrupts': len(device.interrupts),
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}
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return device
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def writeGo(outdir, device):
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# The Go module for this device.
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out = open(outdir + '/' + device.metadata['nameLower'] + '.go', 'w')
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pkgName = os.path.basename(outdir.rstrip('/'))
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out.write('''\
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// Automatically generated file. DO NOT EDIT.
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// Generated by gen-device-avr.py from {file}, see {descriptorSource}
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// +build {pkgName},{nameLower}
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// {description}
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package {pkgName}
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import "unsafe"
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// Magic type name for the compiler.
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type __reg uint8
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// Export this magic type name.
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type RegValue = __reg
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// Some information about this device.
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const (
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DEVICE = "{name}"
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ARCH = "{arch}"
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FAMILY = "{family}"
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)
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'''.format(pkgName=pkgName, **device.metadata))
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out.write('\n// Interrupts\nconst (\n')
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for intr in device.interrupts:
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out.write('\tIRQ_{name} = {index} // {description}\n'.format(**intr))
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intrMax = max(map(lambda intr: intr['index'], device.interrupts))
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out.write('\tIRQ_max = {} // Highest interrupt number on this device.\n'.format(intrMax))
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out.write(')\n')
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out.write('\n// Peripherals.\nvar (')
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first = True
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for peripheral in device.peripherals:
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out.write('\n\t// {description}\n'.format(**peripheral))
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for register in peripheral['registers']:
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for variant in register['variants']:
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out.write('\t{name} = (*__reg)(unsafe.Pointer(uintptr(0x{address:x})))\n'.format(**variant))
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out.write(')\n')
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for peripheral in device.peripherals:
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if not sum(map(lambda r: len(r['bitfields']), peripheral['registers'])): continue
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out.write('\n// Bitfields for {name}: {description}\nconst('.format(**peripheral))
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for register in peripheral['registers']:
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if not register['bitfields']: continue
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for variant in register['variants']:
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out.write('\n\t// {name}'.format(**variant))
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if register['description']:
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out.write(': {description}'.format(**register))
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out.write('\n')
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for bitfield in register['bitfields']:
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out.write('\t{name} = 0x{value:x}'.format(**bitfield))
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if bitfield['description']:
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out.write(' // {description}'.format(**bitfield))
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out.write('\n')
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out.write(')\n')
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|
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def writeLD(outdir, device):
|
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# Variables for the linker script.
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out = open(outdir + '/' + device.metadata['nameLower'] + '.ld', 'w')
|
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out.write('''\
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
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/* Generated by gen-device-avr.py from {file}, see {descriptorSource} */
|
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|
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__flash_size = 0x{flashSize:x};
|
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__ram_size = 0x{ramSize:x};
|
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__num_isrs = {numInterrupts};
|
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'''.format(**device.metadata))
|
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out.close()
|
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|
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|
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def generate(indir, outdir):
|
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for filepath in sorted(glob(indir + '/*.atdf')):
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print(filepath)
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device = readATDF(filepath)
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writeGo(outdir, device)
|
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writeLD(outdir, device)
|
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|
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|
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if __name__ == '__main__':
|
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indir = sys.argv[1] # directory with register descriptor files (*.atdf)
|
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outdir = sys.argv[2] # output directory
|
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generate(indir, outdir)
|
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|
|
@ -52,6 +52,7 @@ def readSVD(path):
|
|||
peripheral = {
|
||||
'name': name,
|
||||
'description': description,
|
||||
'baseAddress': baseAddress,
|
||||
'registers': [],
|
||||
}
|
||||
device.peripherals.append(peripheral)
|
||||
|
|
@ -94,7 +95,6 @@ def readSVD(path):
|
|||
'nameLower': deviceName.lower(),
|
||||
'description': deviceDescription,
|
||||
'licenseBlock': '\n// ' + licenseText.replace('\n', '\n// '),
|
||||
'regType': 'uint32',
|
||||
'arch': ARM_ARCHS[cpuName],
|
||||
'family': getText(root.getElementsByTagName('series')[0]),
|
||||
}
|
||||
|
|
@ -134,119 +134,13 @@ def parseSVDRegister(peripheralName, regEl, baseAddress, namePrefix=''):
|
|||
})
|
||||
|
||||
return {
|
||||
'variants': [{
|
||||
'name': namePrefix + regName,
|
||||
'address': address,
|
||||
}],
|
||||
'description': regDescription.replace('\n', ' '),
|
||||
'bitfields': fields,
|
||||
'array': array,
|
||||
}
|
||||
|
||||
def readATDF(path):
|
||||
# Read Atmel device descriptor files.
|
||||
# See: http://packs.download.atmel.com
|
||||
|
||||
device = Device()
|
||||
|
||||
xml = minidom.parse(path)
|
||||
device = xml.getElementsByTagName('device')[0]
|
||||
deviceName = device.getAttribute('name')
|
||||
arch = device.getAttribute('architecture')
|
||||
family = device.getAttribute('family')
|
||||
|
||||
memorySizes = {}
|
||||
for el in device.getElementsByTagName('address-space'):
|
||||
addressSpace = {
|
||||
'size': int(el.getAttribute('size'), 0),
|
||||
'segments': {},
|
||||
}
|
||||
memorySizes[el.getAttribute('name')] = addressSpace
|
||||
for segmentEl in el.getElementsByTagName('memory-segment'):
|
||||
addressSpace['segments'][segmentEl.getAttribute('name')] = int(segmentEl.getAttribute('size'), 0)
|
||||
|
||||
device.interrupts = []
|
||||
for el in device.getElementsByTagName('interrupts')[0].getElementsByTagName('interrupt'):
|
||||
device.interrupts.append({
|
||||
'index': int(el.getAttribute('index')),
|
||||
'name': el.getAttribute('name'),
|
||||
'description': el.getAttribute('caption'),
|
||||
})
|
||||
|
||||
allRegisters = {}
|
||||
commonRegisters = {}
|
||||
|
||||
device.peripherals = []
|
||||
for el in xml.getElementsByTagName('modules')[0].getElementsByTagName('module'):
|
||||
peripheral = {
|
||||
'name': el.getAttribute('name'),
|
||||
'description': el.getAttribute('caption'),
|
||||
'registers': [],
|
||||
}
|
||||
device.peripherals.append(peripheral)
|
||||
for regElGroup in el.getElementsByTagName('register-group'):
|
||||
for regEl in regElGroup.getElementsByTagName('register'):
|
||||
size = int(regEl.getAttribute('size'))
|
||||
regName = regEl.getAttribute('name')
|
||||
regOffset = int(regEl.getAttribute('offset'), 0)
|
||||
reg = {
|
||||
'description': regEl.getAttribute('caption'),
|
||||
'bitfields': [],
|
||||
'array': None,
|
||||
}
|
||||
if size == 1:
|
||||
reg['variants'] = [{
|
||||
'name': regName,
|
||||
'address': regOffset,
|
||||
}]
|
||||
elif size == 2:
|
||||
reg['variants'] = [{
|
||||
'name': regName + 'L',
|
||||
'address': regOffset,
|
||||
}, {
|
||||
'name': regName + 'H',
|
||||
'address': regOffset,
|
||||
}]
|
||||
else:
|
||||
reg['variants'] = [] # TODO
|
||||
|
||||
for bitfieldEl in regEl.getElementsByTagName('bitfield'):
|
||||
reg['bitfields'].append({
|
||||
'name': regName + '_' + bitfieldEl.getAttribute('name'),
|
||||
'description': bitfieldEl.getAttribute('caption'),
|
||||
'value': int(bitfieldEl.getAttribute('mask'), 0),
|
||||
})
|
||||
|
||||
if regName in allRegisters:
|
||||
firstReg = allRegisters[regName]
|
||||
if firstReg['register'] in firstReg['peripheral']['registers']:
|
||||
firstReg['peripheral']['registers'].remove(firstReg['register'])
|
||||
if firstReg['address'] != regOffset:
|
||||
continue # TODO
|
||||
commonRegisters = allRegisters[regName]['register']
|
||||
continue
|
||||
else:
|
||||
allRegisters[regName] = {'address': regOffset, 'register': reg, 'peripheral': peripheral}
|
||||
|
||||
peripheral['registers'].append(reg)
|
||||
|
||||
device.metadata = {
|
||||
'file': os.path.basename(path),
|
||||
'descriptorSource': 'http://packs.download.atmel.com/',
|
||||
'name': deviceName,
|
||||
'nameLower': deviceName.lower(),
|
||||
'description': 'Device information for the {}.'.format(deviceName),
|
||||
'licenseBlock': '',
|
||||
'regType': 'uint8',
|
||||
'arch': arch,
|
||||
'family': family,
|
||||
'flashSize': memorySizes['prog']['size'],
|
||||
'ramSize': memorySizes['data']['segments'].get('IRAM', memorySizes['data']['segments'].get('INTERNAL_SRAM')),
|
||||
'numInterrupts': len(device.interrupts),
|
||||
}
|
||||
|
||||
return device
|
||||
|
||||
def writeGo(outdir, device):
|
||||
# The Go module for this device.
|
||||
out = open(outdir + '/' + device.metadata['nameLower'] + '.go', 'w')
|
||||
|
|
@ -261,8 +155,10 @@ def writeGo(outdir, device):
|
|||
// {licenseBlock}
|
||||
package {pkgName}
|
||||
|
||||
import "unsafe"
|
||||
|
||||
// Magic type name for the compiler.
|
||||
type __reg {regType}
|
||||
type __reg uint32
|
||||
|
||||
// Export this magic type name.
|
||||
type RegValue = __reg
|
||||
|
|
@ -282,33 +178,41 @@ const (
|
|||
out.write('\tIRQ_max = {} // Highest interrupt number on this device.\n'.format(intrMax))
|
||||
out.write(')\n')
|
||||
|
||||
out.write('\n// Peripherals\nvar (')
|
||||
for peripheral in device.peripherals:
|
||||
out.write('\n\t// {description}\n\t{name} = struct {{\n'.format(**peripheral))
|
||||
out.write('\n// {description}\ntype {name}_Type struct {{\n'.format(**peripheral))
|
||||
address = peripheral['baseAddress']
|
||||
padNumber = 0
|
||||
for register in peripheral['registers']:
|
||||
for variant in register['variants']:
|
||||
if address > register['address']:
|
||||
# In Nordic SVD files, these registers are deprecated or
|
||||
# duplicates, so can be ignored.
|
||||
#print('skip: %s.%s' % (peripheral['name'], register['name']))
|
||||
continue
|
||||
|
||||
# insert padding, if needed
|
||||
if address < register['address']:
|
||||
numSkip = (register['address'] - address) // 4
|
||||
if numSkip == 1:
|
||||
out.write('\t_padding{padNumber} __reg\n'.format(padNumber=padNumber))
|
||||
else:
|
||||
out.write('\t_padding{padNumber} [{num}]__reg\n'.format(padNumber=padNumber, num=numSkip))
|
||||
padNumber += 1
|
||||
|
||||
regType = '__reg'
|
||||
if register['array'] is not None:
|
||||
regType = '[{}]__reg'.format(register['array'])
|
||||
out.write('\t\t{name} {regType}\n'.format(**variant, regType=regType))
|
||||
out.write('\t}{\n')
|
||||
for register in peripheral['registers']:
|
||||
for variant in register['variants']:
|
||||
out.write('\t\t{name}: '.format(**variant))
|
||||
if register['array'] is not None:
|
||||
out.write('[{num}]__reg{{'.format(num=register['array']))
|
||||
if register['description']:
|
||||
out.write(' // {description}'.format(**register))
|
||||
out.write('\n')
|
||||
for i in range(register['array']):
|
||||
out.write('\t\t\t0x{:x},\n'.format(variant['address'] + i * 4)) # TODO: pointer width
|
||||
out.write('\t\t},')
|
||||
out.write('\t{name} {regType}\n'.format(**register, regType=regType))
|
||||
|
||||
# next address
|
||||
if register['array'] is not None and 1:
|
||||
address = register['address'] + 4 * register['array']
|
||||
else:
|
||||
out.write('0x{address:x},'.format(**variant))
|
||||
if register['description']:
|
||||
out.write(' // {description}'.format(**register))
|
||||
out.write('\n')
|
||||
out.write('\t}\n')
|
||||
address = register['address'] + 4
|
||||
out.write('}\n')
|
||||
|
||||
out.write('\n// Peripherals.\nvar (\n')
|
||||
for peripheral in device.peripherals:
|
||||
out.write('\t{name} = (*{name}_Type)(unsafe.Pointer(uintptr(0x{baseAddress:x}))) // {description}\n'.format(**peripheral))
|
||||
out.write(')\n')
|
||||
|
||||
for peripheral in device.peripherals:
|
||||
|
|
@ -316,44 +220,24 @@ const (
|
|||
out.write('\n// Bitfields for {name}: {description}\nconst('.format(**peripheral))
|
||||
for register in peripheral['registers']:
|
||||
if not register['bitfields']: continue
|
||||
for variant in register['variants']:
|
||||
out.write('\n\t// {name}'.format(**variant))
|
||||
out.write('\n\t// {name}'.format(**register))
|
||||
if register['description']:
|
||||
out.write(': {description}'.format(**register))
|
||||
out.write('\n')
|
||||
for bitfield in register['bitfields']:
|
||||
out.write('\t{name} = 0x{value:x}'.format(**bitfield))
|
||||
if bitfield['description']:
|
||||
out.write('// {description}'.format(**bitfield))
|
||||
out.write(' // {description}'.format(**bitfield))
|
||||
out.write('\n')
|
||||
out.write(')\n')
|
||||
|
||||
def writeLD(outdir, device):
|
||||
# Variables for the linker script.
|
||||
out = open(outdir + '/' + device.metadata['nameLower'] + '.ld', 'w')
|
||||
out.write('''\
|
||||
/* Automatically generated file. DO NOT EDIT. */
|
||||
/* Generated by gen-device.py from {file}, see {descriptorSource} */
|
||||
|
||||
__flash_size = 0x{flashSize:x};
|
||||
__ram_size = 0x{ramSize:x};
|
||||
__num_isrs = {numInterrupts};
|
||||
'''.format(**device.metadata))
|
||||
out.close()
|
||||
|
||||
|
||||
def generate(indir, outdir):
|
||||
for filepath in glob(indir + '/*.svd'):
|
||||
for filepath in sorted(glob(indir + '/*.svd')):
|
||||
print(filepath)
|
||||
device = readSVD(filepath)
|
||||
writeGo(outdir, device)
|
||||
|
||||
for filepath in glob(indir + '/*.atdf'):
|
||||
print(filepath)
|
||||
device = readATDF(filepath)
|
||||
writeGo(outdir, device)
|
||||
writeLD(outdir, device)
|
||||
|
||||
|
||||
if __name__ == '__main__':
|
||||
indir = sys.argv[1] # directory with register descriptor files (*.svd, *.atdf)
|
||||
|
|
@ -29,6 +29,10 @@
|
|||
// POSSIBILITY OF SUCH DAMAGE.
|
||||
package arm
|
||||
|
||||
import (
|
||||
"unsafe"
|
||||
)
|
||||
|
||||
type __reg uint32
|
||||
type RegValue = __reg
|
||||
|
||||
|
|
@ -42,22 +46,13 @@ const (
|
|||
)
|
||||
|
||||
// Nested Vectored Interrupt Controller (NVIC).
|
||||
var NVIC = struct {
|
||||
type NVIC_Type struct {
|
||||
ISER [8]__reg
|
||||
}{
|
||||
ISER: [8]__reg{
|
||||
NVIC_BASE + 0x000,
|
||||
NVIC_BASE + 0x004,
|
||||
NVIC_BASE + 0x008,
|
||||
NVIC_BASE + 0x00C,
|
||||
NVIC_BASE + 0x010,
|
||||
NVIC_BASE + 0x014,
|
||||
NVIC_BASE + 0x018,
|
||||
NVIC_BASE + 0x01C,
|
||||
},
|
||||
}
|
||||
|
||||
var NVIC = (*NVIC_Type)(unsafe.Pointer(uintptr(NVIC_BASE)))
|
||||
|
||||
// Enable the given interrupt number.
|
||||
func EnableIRQ(irq uint32) {
|
||||
NVIC.ISER[irq >> 5] = 1 << (irq & 0x1F)
|
||||
NVIC.ISER[irq>>5] = 1 << (irq & 0x1F)
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,15 +19,15 @@ const LED = 13
|
|||
func (p GPIO) Configure(config GPIOConfig) {
|
||||
if config.Mode == GPIO_OUTPUT { // set output bit
|
||||
if p.Pin < 8 {
|
||||
avr.PORT.DDRD |= 1 << p.Pin
|
||||
*avr.DDRD |= 1 << p.Pin
|
||||
} else {
|
||||
avr.PORT.DDRB |= 1 << (p.Pin - 8)
|
||||
*avr.DDRB |= 1 << (p.Pin - 8)
|
||||
}
|
||||
} else { // configure input: clear output bit
|
||||
if p.Pin < 8 {
|
||||
avr.PORT.DDRD &^= 1 << p.Pin
|
||||
*avr.DDRD &^= 1 << p.Pin
|
||||
} else {
|
||||
avr.PORT.DDRB &^= 1 << (p.Pin - 8)
|
||||
*avr.DDRB &^= 1 << (p.Pin - 8)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -35,15 +35,15 @@ func (p GPIO) Configure(config GPIOConfig) {
|
|||
func (p GPIO) Set(value bool) {
|
||||
if value { // set bits
|
||||
if p.Pin < 8 {
|
||||
avr.PORT.PORTD |= 1 << p.Pin
|
||||
*avr.PORTD |= 1 << p.Pin
|
||||
} else {
|
||||
avr.PORT.PORTB |= 1 << (p.Pin - 8)
|
||||
*avr.PORTB |= 1 << (p.Pin - 8)
|
||||
}
|
||||
} else { // clear bits
|
||||
if p.Pin < 8 {
|
||||
avr.PORT.PORTB &^= 1 << p.Pin
|
||||
*avr.PORTB &^= 1 << p.Pin
|
||||
} else {
|
||||
avr.PORT.PORTB &^= 1 << (p.Pin - 8)
|
||||
*avr.PORTB &^= 1 << (p.Pin - 8)
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -36,17 +36,17 @@ func init() {
|
|||
|
||||
func initUART() {
|
||||
// Initialize UART at 115200 baud when running at 16MHz.
|
||||
avr.USART.UBRR0H = 0
|
||||
avr.USART.UBRR0L = 8
|
||||
avr.USART.UCSR0B = avr.UCSR0B_RXEN0 | avr.UCSR0B_TXEN0 // enable RX and TX
|
||||
avr.USART.UCSR0C = avr.UCSR0C_UCSZ0 // 8-bits data
|
||||
*avr.UBRR0H = 0
|
||||
*avr.UBRR0L = 8
|
||||
*avr.UCSR0B = avr.UCSR0B_RXEN0 | avr.UCSR0B_TXEN0 // enable RX and TX
|
||||
*avr.UCSR0C = avr.UCSR0C_UCSZ0 // 8-bits data
|
||||
}
|
||||
|
||||
func putchar(c byte) {
|
||||
for (avr.USART.UCSR0A & avr.UCSR0A_UDRE0) == 0 {
|
||||
for (*avr.UCSR0A & avr.UCSR0A_UDRE0) == 0 {
|
||||
// Wait until previous char has been sent.
|
||||
}
|
||||
avr.USART.UDR0 = avr.RegValue(c) // send char
|
||||
*avr.UDR0 = avr.RegValue(c) // send char
|
||||
}
|
||||
|
||||
// Sleep by the given amount.
|
||||
|
|
@ -73,21 +73,21 @@ func sleepWDT(period uint8) {
|
|||
avr.Asm("cli")
|
||||
avr.Asm("wdr")
|
||||
// Start timed sequence.
|
||||
avr.WDT.WDTCSR |= avr.WDTCSR_WDCE | avr.WDTCSR_WDE
|
||||
*avr.WDTCSR |= avr.WDTCSR_WDCE | avr.WDTCSR_WDE
|
||||
// Enable WDT and set new timeout (0.5s)
|
||||
avr.WDT.WDTCSR = avr.WDTCSR_WDIE | avr.RegValue(period)
|
||||
*avr.WDTCSR = avr.WDTCSR_WDIE | avr.RegValue(period)
|
||||
avr.Asm("sei")
|
||||
|
||||
// Set sleep mode to idle and enable sleep mode.
|
||||
// Note: when using something other than idle, the UART won't work
|
||||
// correctly. This needs to be fixed, though, so we can truly sleep.
|
||||
avr.CPU.SMCR = (0 << 1) | avr.SMCR_SE
|
||||
*avr.SMCR = (0 << 1) | avr.SMCR_SE
|
||||
|
||||
// go to sleep
|
||||
avr.Asm("sleep")
|
||||
|
||||
// disable sleep
|
||||
avr.CPU.SMCR = 0
|
||||
*avr.SMCR = 0
|
||||
}
|
||||
|
||||
func monotime() uint64 {
|
||||
|
|
|
|||
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