stm32f7: add pwm
Этот коммит содержится в:
Kenneth Bell
Ron Evans
родитель
c43a41165a
коммит
ac54302301
4 изменённых файлов: 438 добавлений и 3 удалений
11
src/examples/pwm/nucleo-f722ze.go
Обычный файл
11
src/examples/pwm/nucleo-f722ze.go
Обычный файл
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@ -0,0 +1,11 @@
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// +build stm32f7
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package main
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import "machine"
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var (
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pwm = &machine.TIM1
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pinA = machine.PA8
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pinB = machine.PA9
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)
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@ -1,4 +1,4 @@
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// +build stm32f4 stm32l5 stm32l0 stm32l4
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// +build stm32f4 stm32l5 stm32l0 stm32l4 stm32l5 stm32f7
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package machine
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@ -6,9 +6,29 @@ package machine
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import (
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"device/stm32"
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"runtime/interrupt"
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"runtime/volatile"
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"unsafe"
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)
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// Alternative peripheral pin functions
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const (
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AF0_SYSTEM = 0
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AF1_TIM1_2 = 1
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AF2_TIM3_4_5 = 2
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AF3_TIM8_9_10_11_LPTIM1 = 3
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AF4_I2C1_2_3_USART1 = 4
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AF5_SPI1_2_3_4_5_I2S1_2_3 = 5
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AF6_SPI2_3_I2S2_3_SAI1_UART4 = 6
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AF7_SPI2_3_I2S2_3_USART1_2_3_UART5 = 7
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AF8_SAI2_USART6_UART4_5_7_8_OTG1_FS = 8
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AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS = 9
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AF10_SAI2_QUADSPI_SDMMC2_OTG2_HS_OTG1_FS = 10
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AF11_SDMMC2 = 11
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AF12_UART7_FMC_SDMMC1_OTG2_FS = 12
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AF15_EVENTOUT = 15
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)
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const (
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PA0 = portA + 0
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PA1 = portA + 1
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@ -129,8 +149,39 @@ const (
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PG14 = portG + 14
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PG15 = portG + 15
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PH0 = portH + 0
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PH1 = portH + 1
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PH0 = portH + 0
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PH1 = portH + 1
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PH2 = portH + 2
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PH3 = portH + 3
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PH4 = portH + 4
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PH5 = portH + 5
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PH6 = portH + 6
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PH7 = portH + 7
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PH8 = portH + 8
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PH9 = portH + 9
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PH10 = portH + 10
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PH11 = portH + 11
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PH12 = portH + 12
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PH13 = portH + 13
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PH14 = portH + 14
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PH15 = portH + 15
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PI0 = portI + 0
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PI1 = portI + 1
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PI2 = portI + 2
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PI3 = portI + 3
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PI4 = portI + 4
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PI5 = portI + 5
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PI6 = portI + 6
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PI7 = portI + 7
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PI8 = portI + 8
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PI9 = portI + 9
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PI10 = portI + 10
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PI11 = portI + 11
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PI12 = portI + 12
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PI13 = portI + 13
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PI14 = portI + 14
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PI15 = portI + 15
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)
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func (p Pin) getPort() *stm32.GPIO_Type {
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@ -257,3 +308,370 @@ func enableAltFuncClock(bus unsafe.Pointer) {
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stm32.RCC.APB2ENR.SetBits(stm32.RCC_APB2ENR_TIM1EN)
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}
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}
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//---------- Timer related code
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var (
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TIM1 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM1EN,
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Device: stm32.TIM1,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PA8, AF1_TIM1_2},
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{PE9, AF1_TIM1_2},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA9, AF1_TIM1_2},
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{PE11, AF1_TIM1_2},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA10, AF1_TIM1_2},
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{PE13, AF1_TIM1_2},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA11, AF1_TIM1_2},
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{PE14, AF1_TIM1_2},
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}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM2 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM2EN,
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Device: stm32.TIM2,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PA0, AF1_TIM1_2},
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{PA5, AF1_TIM1_2},
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{PA15, AF1_TIM1_2},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA1, AF1_TIM1_2},
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{PB3, AF1_TIM1_2},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA2, AF1_TIM1_2},
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{PB10, AF1_TIM1_2},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA3, AF1_TIM1_2},
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{PB11, AF1_TIM1_2},
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}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM3 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM3EN,
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Device: stm32.TIM3,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PA6, AF2_TIM3_4_5},
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{PB4, AF2_TIM3_4_5},
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{PC6, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA7, AF2_TIM3_4_5},
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{PB5, AF2_TIM3_4_5},
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{PC7, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PB0, AF2_TIM3_4_5},
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{PC8, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PB1, AF2_TIM3_4_5},
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{PC9, AF2_TIM3_4_5},
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}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM4 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM4EN,
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Device: stm32.TIM4,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PB6, AF2_TIM3_4_5},
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{PD12, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PB7, AF2_TIM3_4_5},
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{PD13, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PB8, AF2_TIM3_4_5},
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{PD14, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PB9, AF2_TIM3_4_5},
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{PD15, AF2_TIM3_4_5},
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}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM5 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM5EN,
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Device: stm32.TIM5,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PA0, AF2_TIM3_4_5},
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{PH10, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA1, AF2_TIM3_4_5},
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{PH11, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA2, AF2_TIM3_4_5},
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{PH12, AF2_TIM3_4_5},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA3, AF2_TIM3_4_5},
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{PI0, AF2_TIM3_4_5},
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}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM6 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM6EN,
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Device: stm32.TIM6,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM7 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM7EN,
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Device: stm32.TIM7,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM8 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM8EN,
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Device: stm32.TIM8,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PC6, AF3_TIM8_9_10_11_LPTIM1},
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{PI5, AF3_TIM8_9_10_11_LPTIM1},
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}},
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TimerChannel{Pins: []PinFunction{
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{PC7, AF3_TIM8_9_10_11_LPTIM1},
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{PI6, AF3_TIM8_9_10_11_LPTIM1},
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}},
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TimerChannel{Pins: []PinFunction{
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{PC8, AF3_TIM8_9_10_11_LPTIM1},
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{PI7, AF3_TIM8_9_10_11_LPTIM1},
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}},
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TimerChannel{Pins: []PinFunction{
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{PC9, AF3_TIM8_9_10_11_LPTIM1},
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{PI2, AF3_TIM8_9_10_11_LPTIM1},
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}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM9 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM9EN,
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Device: stm32.TIM9,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PA2, AF3_TIM8_9_10_11_LPTIM1},
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{PE5, AF3_TIM8_9_10_11_LPTIM1},
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}},
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TimerChannel{Pins: []PinFunction{
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{PA3, AF3_TIM8_9_10_11_LPTIM1},
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{PE6, AF3_TIM8_9_10_11_LPTIM1},
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}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM10 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM10EN,
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Device: stm32.TIM10,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PB8, AF3_TIM8_9_10_11_LPTIM1},
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{PF6, AF3_TIM8_9_10_11_LPTIM1},
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}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM11 = TIM{
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EnableRegister: &stm32.RCC.APB2ENR,
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EnableFlag: stm32.RCC_APB2ENR_TIM11EN,
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Device: stm32.TIM11,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PB9, AF3_TIM8_9_10_11_LPTIM1},
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{PF7, AF3_TIM8_9_10_11_LPTIM1},
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}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB2_TIM_FREQ,
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}
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TIM12 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM12EN,
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Device: stm32.TIM12,
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Channels: [4]TimerChannel{
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TimerChannel{Pins: []PinFunction{
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{PB14, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
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{PH6, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
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}},
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TimerChannel{Pins: []PinFunction{
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{PB15, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
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{PH9, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
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||||
}},
|
||||
TimerChannel{Pins: []PinFunction{}},
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TimerChannel{Pins: []PinFunction{}},
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},
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busFreq: APB1_TIM_FREQ,
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}
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TIM13 = TIM{
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EnableRegister: &stm32.RCC.APB1ENR,
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EnableFlag: stm32.RCC_APB1ENR_TIM13EN,
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Device: stm32.TIM13,
|
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Channels: [4]TimerChannel{
|
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TimerChannel{Pins: []PinFunction{
|
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{PA6, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
|
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{PF8, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
|
||||
}},
|
||||
TimerChannel{Pins: []PinFunction{}},
|
||||
TimerChannel{Pins: []PinFunction{}},
|
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TimerChannel{Pins: []PinFunction{}},
|
||||
},
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busFreq: APB1_TIM_FREQ,
|
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}
|
||||
|
||||
TIM14 = TIM{
|
||||
EnableRegister: &stm32.RCC.APB1ENR,
|
||||
EnableFlag: stm32.RCC_APB1ENR_TIM14EN,
|
||||
Device: stm32.TIM14,
|
||||
Channels: [4]TimerChannel{
|
||||
TimerChannel{Pins: []PinFunction{
|
||||
{PA7, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
|
||||
{PF9, AF9_CAN1_TIM12_13_14_QUADSPI_FMC_OTG2_HS},
|
||||
}},
|
||||
TimerChannel{Pins: []PinFunction{}},
|
||||
TimerChannel{Pins: []PinFunction{}},
|
||||
TimerChannel{Pins: []PinFunction{}},
|
||||
},
|
||||
busFreq: APB1_TIM_FREQ,
|
||||
}
|
||||
)
|
||||
|
||||
func (t *TIM) registerUPInterrupt() interrupt.Interrupt {
|
||||
switch t {
|
||||
case &TIM1:
|
||||
return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM1.handleUPInterrupt)
|
||||
case &TIM2:
|
||||
return interrupt.New(stm32.IRQ_TIM2, TIM2.handleUPInterrupt)
|
||||
case &TIM3:
|
||||
return interrupt.New(stm32.IRQ_TIM3, TIM3.handleUPInterrupt)
|
||||
case &TIM4:
|
||||
return interrupt.New(stm32.IRQ_TIM4, TIM4.handleUPInterrupt)
|
||||
case &TIM5:
|
||||
return interrupt.New(stm32.IRQ_TIM5, TIM5.handleUPInterrupt)
|
||||
case &TIM6:
|
||||
return interrupt.New(stm32.IRQ_TIM6_DAC, TIM6.handleUPInterrupt)
|
||||
case &TIM7:
|
||||
return interrupt.New(stm32.IRQ_TIM7, TIM7.handleUPInterrupt)
|
||||
case &TIM8:
|
||||
return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM8.handleUPInterrupt)
|
||||
case &TIM9:
|
||||
return interrupt.New(stm32.IRQ_TIM1_BRK_TIM9, TIM9.handleUPInterrupt)
|
||||
case &TIM10:
|
||||
return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM10.handleUPInterrupt)
|
||||
case &TIM11:
|
||||
return interrupt.New(stm32.IRQ_TIM1_TRG_COM_TIM11, TIM11.handleUPInterrupt)
|
||||
case &TIM12:
|
||||
return interrupt.New(stm32.IRQ_TIM8_BRK_TIM12, TIM12.handleUPInterrupt)
|
||||
case &TIM13:
|
||||
return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM13.handleUPInterrupt)
|
||||
case &TIM14:
|
||||
return interrupt.New(stm32.IRQ_TIM8_TRG_COM_TIM14, TIM14.handleUPInterrupt)
|
||||
}
|
||||
|
||||
return interrupt.Interrupt{}
|
||||
}
|
||||
|
||||
func (t *TIM) registerOCInterrupt() interrupt.Interrupt {
|
||||
switch t {
|
||||
case &TIM1:
|
||||
return interrupt.New(stm32.IRQ_TIM1_CC, TIM1.handleUPInterrupt)
|
||||
case &TIM2:
|
||||
return interrupt.New(stm32.IRQ_TIM2, TIM2.handleOCInterrupt)
|
||||
case &TIM3:
|
||||
return interrupt.New(stm32.IRQ_TIM3, TIM3.handleOCInterrupt)
|
||||
case &TIM4:
|
||||
return interrupt.New(stm32.IRQ_TIM4, TIM4.handleOCInterrupt)
|
||||
case &TIM5:
|
||||
return interrupt.New(stm32.IRQ_TIM5, TIM5.handleOCInterrupt)
|
||||
case &TIM6:
|
||||
return interrupt.New(stm32.IRQ_TIM6_DAC, TIM6.handleOCInterrupt)
|
||||
case &TIM7:
|
||||
return interrupt.New(stm32.IRQ_TIM7, TIM7.handleOCInterrupt)
|
||||
case &TIM8:
|
||||
return interrupt.New(stm32.IRQ_TIM8_CC, TIM8.handleOCInterrupt)
|
||||
case &TIM9:
|
||||
return interrupt.New(stm32.IRQ_TIM1_BRK_TIM9, TIM9.handleOCInterrupt)
|
||||
case &TIM10:
|
||||
return interrupt.New(stm32.IRQ_TIM1_UP_TIM10, TIM10.handleOCInterrupt)
|
||||
case &TIM11:
|
||||
return interrupt.New(stm32.IRQ_TIM1_TRG_COM_TIM11, TIM11.handleOCInterrupt)
|
||||
case &TIM12:
|
||||
return interrupt.New(stm32.IRQ_TIM8_BRK_TIM12, TIM12.handleOCInterrupt)
|
||||
case &TIM13:
|
||||
return interrupt.New(stm32.IRQ_TIM8_UP_TIM13, TIM13.handleOCInterrupt)
|
||||
case &TIM14:
|
||||
return interrupt.New(stm32.IRQ_TIM8_TRG_COM_TIM14, TIM14.handleOCInterrupt)
|
||||
}
|
||||
|
||||
return interrupt.Interrupt{}
|
||||
}
|
||||
|
||||
func (t *TIM) enableMainOutput() {
|
||||
t.Device.BDTR.SetBits(stm32.TIM_BDTR_MOE)
|
||||
}
|
||||
|
||||
type arrtype = uint32
|
||||
type arrRegType = volatile.Register32
|
||||
|
||||
const (
|
||||
ARR_MAX = 0x10000
|
||||
PSC_MAX = 0x10000
|
||||
)
|
||||
|
|
|
|||
|
|
@ -12,6 +12,12 @@ func CPUFrequency() uint32 {
|
|||
return 216000000
|
||||
}
|
||||
|
||||
// Internal use: configured speed of the APB1 and APB2 timers, this should be kept
|
||||
// in sync with any changes to runtime package which configures the oscillators
|
||||
// and clock frequencies
|
||||
const APB1_TIM_FREQ = 54e6 // 54MHz
|
||||
const APB2_TIM_FREQ = 216e6 // 216MHz
|
||||
|
||||
//---------- UART related code
|
||||
|
||||
// Configure the UART.
|
||||
|
|
|
|||
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