Граф коммитов

758 коммитов

Автор SHA1 Сообщение Дата
Ethan Reesor
079a789d49 Minimal NXP/Teensy support 2020-07-08 21:58:15 +02:00
Branden Timm
33024d4aa2
Fix portL mappings for atmega2560 (#1222)
* machine/atmega2560: fix portL mapping for atmega2560
2020-07-08 19:02:10 +02:00
Yannis Huber
7ed7e6cb11 risc-v: disable linker relaxations during gp init 2020-07-08 01:58:12 +02:00
Yannis Huber
0b94e486c1 maixbit: changes according to feedback 2020-07-08 00:21:59 +02:00
Yannis Huber
5ff76aacab runtime: reuse common code between 32 and 64-bit RISC-V 2020-07-08 00:21:59 +02:00
Yannis Huber
43a66b39cc riscv: refactor assembly files to support RV64 and F extension 2020-07-08 00:21:59 +02:00
Yannis Huber
66b21b4c86 maixbit (interruptions): fix fpioa function test 2020-07-08 00:21:59 +02:00
Yannis Huber
f2fbd1dd7e maixbit (gpio): fix pin configuration 2020-07-08 00:21:59 +02:00
Yannis Huber
21a9aa8102 maixbit (i2c): fix rx fifo buffer length 2020-07-08 00:21:59 +02:00
Yannis Huber
a685217743 maixbit: add I2C support 2020-07-08 00:21:59 +02:00
Yannis Huber
ad0c15080a maixbit: add SPI support 2020-07-08 00:21:59 +02:00
Yannis Huber
5446c6927e maixbit: add GPIOHS pin interrupt support 2020-07-08 00:21:59 +02:00
Yannis Huber
53c83fa445 maixbit: support both GPIO and GPIOHS controllers 2020-07-08 00:21:59 +02:00
Yannis Huber
804dc8b1f9 maixbit: init fpioa clock at reset 2020-07-08 00:21:59 +02:00
Yannis Huber
e1ceca1931 maixbit: remove atomic operations 2020-07-08 00:21:59 +02:00
Yannis Huber
6620c4d2aa maixbit: add chip datasheet link and reformat code 2020-07-08 00:21:59 +02:00
Yannis Huber
ccc604d2e0 riscv: fix offset in 64bit scheduler
Also keep common start.S file for 64 and 32 bit architectures.
2020-07-08 00:21:59 +02:00
Yannis Huber
dfab1aa717 maixbit (uart): serial is working with echo example 2020-07-08 00:21:59 +02:00
Yannis Huber
d599959711 maixbit (uart): working on data tx
When the data to send is too long the program gives an exception.
2020-07-08 00:21:59 +02:00
Yannis Huber
7814964693 maixbit: add board definition and dummy runtime 2020-07-08 00:21:59 +02:00
sago35
1a6bed3305
machine/samd51: add DAC support (#1198)
* machine/samd51: add DAC support
2020-07-06 14:02:51 +02:00
Branden Timm
e0b9b1ecd1 machine: fix atmega2560 mapping for pins D2 and D5 2020-07-05 21:18:20 +02:00
Ron Evans
a85df334e6
machine/samd21: basic implementation for DAC (#1183)
* machine/samd21: basic DAC implementation

Signed-off-by: Ron Evans <ron@hybridgroup.com>
2020-07-04 18:16:25 +02:00
Jaden Weiss
89a9c09af5 runtime (atsamd51): allow interrupts to wake the scheduler 2020-07-04 15:00:44 +02:00
Ayke van Laethem
1451eeaf41 machine: change machine.Pin type to uint8
The `machine.Pin` type was a int8, which works fine but limits the
number of pin numbers to 127. This patch changes the type to uint8 and
changes NoPin to 0xff, which allows more pins to be used.

Some boards might not have that many pins but their internal
organization requires more pin numbers to be used (because it is
organized in pin ports and not all pins in a port have a physical
connection). Therefore the range of a int8 is too low to address these
higher pins.

This patch also has the surprising side effect of reducing binary size
in a number of cases. If there is a reduction it's usually just a few
bytes, with one outlier: the driver example amg88xx when compiled for
the pybadge board. I have not seen any increases in binary size.
2020-07-04 09:46:12 +02:00
Jaden Weiss
e8c84d24a0 runtime (gc): do not scan the runqueue when the platform is not baremetal with a scheduler 2020-07-04 08:34:39 +02:00
Jaden Weiss
a4f3457747 runtime: make channels work in interrupts 2020-07-04 08:34:39 +02:00
Ayke van Laethem
acb3cfba6d avr: work around codegen bug in LLVM 10
Commit fc4857e98c (runtime: avoid recursion in printuint64 function)
caused a regression for AVR. I have tried locally with LLVM 11 (which
contains a number of codegen bugs) and the issue is no longer present,
so I'm assuming it's a codegen bug that is now fixed. However, LLVM 11
is not yet released so it seems best to me to work around this
temporarily (for the next few months).

This commit can easily be reverted when we start using LLVM 11.
2020-06-30 17:56:10 +02:00
Cornel
720a54a0fe
extend stdlib to allow import of more packages (#1099)
* stdlib: extend stdlib to allow import of more packages
2020-06-23 11:56:28 +02:00
sago35
2721ab146f
Seeed XIAO support (#1170)
* machine/xiao: add support for Seeedstudio XIAO board
2020-06-22 09:01:13 +02:00
Jaden Weiss
81c723db1a device/arm: do not mask fault handlers in critical sections 2020-06-22 00:08:14 +02:00
sago35
9a20af5b59 Add adc settings 2020-06-19 15:07:57 +02:00
APDevice
4e8e3f348f
Added Adafruit PyGamer Target (#1173)
* machine/PyGamer: add board support
2020-06-19 14:35:42 +02:00
deadprogram
496452b676 machine/hifive1b: add definitions for UART0 pins
Signed-off-by: deadprogram <ron@hybridgroup.com>
2020-06-17 16:28:37 +02:00
Ayke van Laethem
e86ca2080d runtime/interrupt: add cross-chip disable/restore interrupt support
This should cover all supported baremetal targets.
2020-06-14 14:44:22 -04:00
Ayke van Laethem
e2bf7bbb49 device: add new cross-arch Asm and AsmFull functions
This is necessary to avoid a circular dependency between the device/avr
and runtime/interrupts package in the next commit.

It may be worth replacing existing calls like device/arm.Asm to
device.Asm, to have a single place where these are defined.
2020-06-14 14:44:22 -04:00
deadprogram
2281b6a3f5 machine/hifive1b: remove extra println left in by mistake
Signed-off-by: deadprogram <ron@hybridgroup.com>
2020-06-09 13:30:22 +02:00
Jaden Weiss
4321923641 compiler/runtime: move the channel blocked list onto the stack
Previously, chansend and chanrecv allocated a heap object before blocking on a channel.
This object was used to implement a linked list of goroutines blocked on the channel.
The chansend and chanrecv now instead accept a buffer to store this object in as an argument.
The compiler now creates a stack allocation for this object and passes it in.
2020-06-08 19:59:57 +02:00
Ayke van Laethem
169d5f17b8 nrf: fix bug in SPI.Tx
There was what appears to be a race condition in the Tx function. While
it would work fine in many cases, when there were interrupts (such as
when using BLE), the function would just hang waiting for `EVENTS_READY`
to arrive.

I think what was happening was that the `spi.Bus.RXD.Get()` would start
the next transfer, which would complete (and generate an event) before
`EVENTS_READY` was reset to 0. The fix is easy: clear `EVENTS_READY`
before doing something that can trigger an event.

I believe I've seen this bug before on the PineTime but I couldn't find
the issue back then.
2020-06-08 19:54:41 +02:00
Yannis Huber
2396c22658
risc-v: add support for 64-bit RISC-V CPUs 2020-06-08 16:47:39 +02:00
Yannis Huber
d61d5d7ab1 Zero PLIC threshold value at startup
The PLIC threshold value must be zeroed at startup to permit
all interrupt priorities. Fixes #1128.
2020-06-07 11:45:26 +02:00
sago35
c5a896771d
Seeed WioTerminal support (#1124)
* machine/wioterminal: add support for wioterminal board
2020-06-06 12:00:26 +02:00
sago35
0c880ec44c
Standardize SAMD51 UART settings (#1155)
* machine/samd51: standardize samd51 uart settings
2020-06-05 08:14:31 +02:00
sago35
64d51b215f Extend SAMD51 pinPadMapping 2020-06-03 19:37:16 +02:00
sago35
f103e910d7 Add SAMD51 pin change interrupt settings 2020-06-03 19:37:16 +02:00
sago35
40afeea569 Add SAMD51 ADC settings 2020-06-03 19:37:16 +02:00
sago35
97122972fb Add SAMD51 pins 2020-06-03 19:37:16 +02:00
sago35
b92fad8da6
sam: fix register access for interrupts pins in samd51 (#1141)
* machine/samd51: fix register access for interrupts pins in samd51
2020-05-30 18:03:46 +02:00
sago35
5c8d4e54d6 sam: add support for pin change interrupts (samd5x) 2020-05-29 11:36:22 +02:00
Ayke van Laethem
fed433c046 compiler: add support for atomic operations
This also implements DisableInterrupts/EnableInterrupts for RISC-V, as
those operations were needed to implement a few libcalls.
2020-05-28 15:11:46 +02:00